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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-11-12 13:30:10 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-11-12 13:30:10 +0000 |
| commit | fd888630b5295d9b1a29c45baff0cfe38cd2619d (patch) | |
| tree | a6f717cc910e455117d9ebcbdd917d250103a39c /llvm/test/CodeGen/Mips | |
| parent | 0c922fcec566d74045af5e09becfe1d251e04040 (diff) | |
| download | bcm5719-llvm-fd888630b5295d9b1a29c45baff0cfe38cd2619d.tar.gz bcm5719-llvm-fd888630b5295d9b1a29c45baff0cfe38cd2619d.zip | |
[mips][micromips] Add predicate 'InMicroMips' at CodeGen patterns for microMIPS instructions
Differential Revision: http://reviews.llvm.org/D6198
llvm-svn: 221780
Diffstat (limited to 'llvm/test/CodeGen/Mips')
| -rw-r--r-- | llvm/test/CodeGen/Mips/Fast-ISel/shift.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll new file mode 100644 index 00000000000..18fd5ac32d2 --- /dev/null +++ b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll @@ -0,0 +1,24 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -O1 -fast-isel=true -mips-fast-isel -filetype=obj %s -o - \ +; RUN: | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s + +; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used. + +%struct.s = type { [4 x i8], i32 } + +define i32 @main() nounwind uwtable { +entry: + %foo = alloca %struct.s, align 4 + %0 = bitcast %struct.s* %foo to i32* + %bf.load = load i32* %0, align 4 + %bf.lshr = lshr i32 %bf.load, 2 + %cmp = icmp ne i32 %bf.lshr, 2 + br i1 %cmp, label %if.then, label %if.end + +if.then: + unreachable + +if.end: + ret i32 0 +} + +; CHECK: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} |
