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| author | Simon Atanasyan <simon@atanasyan.com> | 2018-09-19 18:46:29 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2018-09-19 18:46:29 +0000 |
| commit | a9e8765e3ebf1e0b455bc38bbb4ba5b8e7a4c9aa (patch) | |
| tree | 98056820393caa31914d4d1555370399de650ac2 /llvm/test/CodeGen/Mips | |
| parent | 852dd83be8b7586036877065e690f5bcb564ea86 (diff) | |
| download | bcm5719-llvm-a9e8765e3ebf1e0b455bc38bbb4ba5b8e7a4c9aa.tar.gz bcm5719-llvm-a9e8765e3ebf1e0b455bc38bbb4ba5b8e7a4c9aa.zip | |
[mips][microMIPS] Extending size reduction pass with MOVEP
The patch extends size reduction pass for MicroMIPS. Two MOVE
instructions are transformed into one MOVEP instrucition.
Patch by Milena Vujosevic Janicic.
Differential revision: https://reviews.llvm.org/D52037
llvm-svn: 342572
Diffstat (limited to 'llvm/test/CodeGen/Mips')
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll | 29 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir | 86 |
2 files changed, 115 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll new file mode 100644 index 00000000000..84998a33463 --- /dev/null +++ b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll @@ -0,0 +1,29 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mattr=+micromips -mcpu=mips32r2 \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +; Function Attrs: nounwind +define i64 @move() { +; CHECK-LABEL: move: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: addiusp -24 +; CHECK-NEXT: .cfi_def_cfa_offset 24 +; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill +; CHECK-NEXT: .cfi_offset 31, -4 +; CHECK-NEXT: jal g +; CHECK-NEXT: nop +; CHECK-NEXT: movep $4, $5, $2, $3 +; CHECK-NEXT: jal f +; CHECK-NEXT: nop +; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload +; CHECK-NEXT: addiusp 24 +; CHECK-NEXT: jrc $ra +entry: + %call = call i64 @g() + %call1 = call i64 @f(i64 signext %call) + ret i64 %call1 +} + +declare i64 @f(i64 signext %a) +declare i64 @g() + diff --git a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir new file mode 100644 index 00000000000..73b0b54fbd5 --- /dev/null +++ b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir @@ -0,0 +1,86 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=mipsel-unknown-linux-gnu -mattr=+micromips -mcpu=mips32r2 \ +# RUN: -verify-machineinstrs -run-pass micromips-reduce-size \ +# RUN: %s -o - | FileCheck %s + +--- | + define i64 @move1() { ret i64 0 } + define i64 @move2() { ret i64 0 } + + declare i64 @f(i64 signext) + declare i64 @g() + +... +--- +name: move1 +stack: + - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +constants: +body: | + bb.0: + liveins: $ra + + ; CHECK-LABEL: name: move1 + ; CHECK: ADDIUSP_MM -24 + ; CHECK: CFI_INSTRUCTION def_cfa_offset 24 + ; CHECK: SWSP_MM killed $ra, $sp, 20 :: (store 4 into %stack.0) + ; CHECK: CFI_INSTRUCTION offset $ra_64, -4 + ; CHECK: JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1 + ; CHECK: $a0, $a1 = MOVEP_MM $v0, $v1 + ; CHECK: JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1 + ; CHECK: $ra = LWSP_MM $sp, 20 :: (load 4 from %stack.0) + ; CHECK: ADDIUSP_MM 24 + ; CHECK: PseudoReturn undef $ra, implicit $v0, implicit $v1 + $sp = ADDiu $sp, -24 + CFI_INSTRUCTION def_cfa_offset 24 + SW killed $ra, $sp, 20 :: (store 4 into %stack.0) + CFI_INSTRUCTION offset $ra_64, -4 + JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1 + $a0 = MOVE16_MM $v0 + $a1 = MOVE16_MM $v1 + JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1 + $ra = LW $sp, 20 :: (load 4 from %stack.0) + $sp = ADDiu $sp, 24 + PseudoReturn undef $ra, implicit $v0, implicit $v1 + +... +--- +name: move2 +stack: + - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +constants: +body: | + bb.0: + liveins: $ra + + ; CHECK-LABEL: name: move2 + ; CHECK: ADDIUSP_MM -24 + ; CHECK: CFI_INSTRUCTION def_cfa_offset 24 + ; CHECK: SWSP_MM killed $ra, $sp, 20 :: (store 4 into %stack.0) + ; CHECK: CFI_INSTRUCTION offset $ra_64, -4 + ; CHECK: JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1 + ; CHECK: $a0, $a1 = MOVEP_MM $v0, $v1 + ; CHECK: JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1 + ; CHECK: $ra = LWSP_MM $sp, 20 :: (load 4 from %stack.0) + ; CHECK: ADDIUSP_MM 24 + ; CHECK: PseudoReturn undef $ra, implicit $v0, implicit $v1 + $sp = ADDiu $sp, -24 + CFI_INSTRUCTION def_cfa_offset 24 + SW killed $ra, $sp, 20 :: (store 4 into %stack.0) + CFI_INSTRUCTION offset $ra_64, -4 + JAL_MM @g, csr_o32, implicit-def dead $ra, implicit-def $sp, implicit-def $v0, implicit-def $v1 + $a1 = MOVE16_MM $v1 + $a0 = MOVE16_MM $v0 + JAL_MM @f, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, implicit-def $v0, implicit-def $v1 + $ra = LW $sp, 20 :: (load 4 from %stack.0) + $sp = ADDiu $sp, 24 + PseudoReturn undef $ra, implicit $v0, implicit $v1 + +... +--- + + |

