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authorPetar Jovanovic <petar.jovanovic@imgtec.com>2016-12-22 19:29:50 +0000
committerPetar Jovanovic <petar.jovanovic@imgtec.com>2016-12-22 19:29:50 +0000
commit8a4e63994e32e2cf3d7f0ba6fd99fca4e9268183 (patch)
tree601b5aed94e8511648d34f821a95b17789b7a934 /llvm/test/CodeGen/Mips
parent88391248485102a5b1c01f59a1ed9840d91ecddf (diff)
downloadbcm5719-llvm-8a4e63994e32e2cf3d7f0ba6fd99fca4e9268183.tar.gz
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[mips] Fix compact branch hazard detection, part 2
Follow up to D27209 fix, this patch now properly handles single transient instruction in basic block. Patch by Aleksandar Beserminji. Differential Revision: https://reviews.llvm.org/D27856 llvm-svn: 290361
Diffstat (limited to 'llvm/test/CodeGen/Mips')
-rw-r--r--llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll34
1 files changed, 34 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll b/llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll
new file mode 100644
index 00000000000..d8046ea0e25
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll
@@ -0,0 +1,34 @@
+; RUN: llc -march=mips64el -O0 -mcpu=mips64r6 < %s | FileCheck %s
+; RUN: llc -march=mips64 -O0 -mcpu=mips64r6 < %s | FileCheck %s
+
+@boo = global i32 0, align 4
+
+; Function Attrs: nounwind
+define void @_Z3foov() #0 {
+entry:
+ %0 = load volatile i32, i32* @boo, align 4
+ switch i32 %0, label %sw.epilog [
+ i32 0, label %sw.bb
+ i32 1, label %sw.bb1
+ i32 2, label %sw.bb1
+ ]
+
+sw.bb: ; preds = %entry
+ store volatile i32 1, i32* @boo, align 4
+ br label %sw.epilog
+; CHECK: beqzc
+; CHECK-NEXT: nop
+; CHECK-NEXT: .LBB
+; CHECK-NEXT: j
+
+sw.bb1: ; preds = %entry, %entry
+ store volatile i32 2, i32* @boo, align 4
+ br label %sw.epilog
+; CHECK: bnezc
+; CHECK-NEXT: nop
+; CHECK-NEXT: .LBB
+; CHECK-NEXT: j
+
+sw.epilog: ; preds = %entry, %sw.bb1, %sw.bb
+ ret void
+}
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