[MIPS GlobalISel] Select G_IMPLICIT_DEF

G_IMPLICIT_DEF is used for both integer and floating point implicit-def.
Handle G_IMPLICIT_DEF as ambiguous opcode in MipsRegisterBankInfo.
Select G_IMPLICIT_DEF for MIPS32.

Differential Revision: https://reviews.llvm.org/D67439

llvm-svn: 371727

4 files changed, 412 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/implicit_def.mir b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/implicit_def.mir
new file mode 100644
index 00000000000..8d94db80fdd
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/implicit_def.mir
@@ -0,0 +1,114 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+  declare void @f_i32(i32)
+  define void @g_i32() {entry: ret void}
+
+  declare void @f_i64(i64)
+  define void @g_i64() {entry: ret void}
+
+  declare void @f_float(float)
+  define void @g_float() {entry: ret void}
+
+  declare void @f_double(double)
+  define void @g_double() {entry: ret void}
+
+...
+---
+name:            g_i32
+alignment:       2
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_i32
+    ; MIPS32: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[DEF]]
+    ; MIPS32: JAL @f_i32, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:gprb(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $a0 = COPY %0(s32)
+    JAL @f_i32, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_i64
+alignment:       2
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_i64
+    ; MIPS32: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
+    ; MIPS32: [[DEF1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[DEF]]
+    ; MIPS32: $a1 = COPY [[DEF1]]
+    ; MIPS32: JAL @f_i64, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %3:gprb(s32) = G_IMPLICIT_DEF
+    %4:gprb(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $a0 = COPY %3(s32)
+    $a1 = COPY %4(s32)
+    JAL @f_i64, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_float
+alignment:       2
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_float
+    ; MIPS32: [[DEF:%[0-9]+]]:fgr32 = IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $f12 = COPY [[DEF]]
+    ; MIPS32: JAL @f_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:fprb(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $f12 = COPY %0(s32)
+    JAL @f_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_double
+alignment:       2
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_double
+    ; MIPS32: [[DEF:%[0-9]+]]:afgr64 = IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $d6 = COPY [[DEF]]
+    ; MIPS32: JAL @f_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:fprb(s64) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $d6 = COPY %0(s64)
+    JAL @f_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/implicit_def.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/implicit_def.mir
new file mode 100644
index 00000000000..4f437803d46
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/implicit_def.mir
@@ -0,0 +1,105 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+  declare void @f_i32(i32)
+  define void @g_i32() {entry: ret void}
+
+  declare void @f_i64(i64)
+  define void @g_i64() {entry: ret void}
+
+  declare void @f_float(float)
+  define void @g_float() {entry: ret void}
+
+  declare void @f_double(double)
+  define void @g_double() {entry: ret void}
+
+...
+---
+name:            g_i32
+alignment:       2
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_i32
+    ; MIPS32: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[DEF]](s32)
+    ; MIPS32: JAL @f_i32, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $a0 = COPY %0(s32)
+    JAL @f_i32, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_i64
+alignment:       2
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_i64
+    ; MIPS32: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
+    ; MIPS32: $a0 = COPY [[UV]](s32)
+    ; MIPS32: $a1 = COPY [[UV1]](s32)
+    ; MIPS32: JAL @f_i64, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s64) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    %1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
+    $a0 = COPY %1(s32)
+    $a1 = COPY %2(s32)
+    JAL @f_i64, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_float
+alignment:       2
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_float
+    ; MIPS32: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $f12 = COPY [[DEF]](s32)
+    ; MIPS32: JAL @f_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $f12 = COPY %0(s32)
+    JAL @f_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_double
+alignment:       2
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_double
+    ; MIPS32: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $d6 = COPY [[DEF]](s64)
+    ; MIPS32: JAL @f_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s64) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $d6 = COPY %0(s64)
+    JAL @f_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/implicit_def.ll b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/implicit_def.ll
new file mode 100644
index 00000000000..7c94a5b0bb6
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/implicit_def.ll
@@ -0,0 +1,83 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc  -O0 -mtriple=mipsel-linux-gnu -global-isel  -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+
+declare void @f_i32(i32)
+define void @g_i32() {
+; MIPS32-LABEL: g_i32:
+; MIPS32:       # %bb.0: # %entry
+; MIPS32-NEXT:    addiu $sp, $sp, -24
+; MIPS32-NEXT:    .cfi_def_cfa_offset 24
+; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    .cfi_offset 31, -4
+; MIPS32-NEXT:    # implicit-def: $a0
+; MIPS32-NEXT:    jal f_i32
+; MIPS32-NEXT:    nop
+; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    addiu $sp, $sp, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+entry:
+  call void @f_i32(i32 undef)
+  ret void
+}
+
+declare void @f_i64(i64)
+define void @g_i64() {
+; MIPS32-LABEL: g_i64:
+; MIPS32:       # %bb.0: # %entry
+; MIPS32-NEXT:    addiu $sp, $sp, -24
+; MIPS32-NEXT:    .cfi_def_cfa_offset 24
+; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    .cfi_offset 31, -4
+; MIPS32-NEXT:    # implicit-def: $a0
+; MIPS32-NEXT:    # implicit-def: $a1
+; MIPS32-NEXT:    jal f_i64
+; MIPS32-NEXT:    nop
+; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    addiu $sp, $sp, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+entry:
+  call void @f_i64(i64 undef)
+  ret void
+}
+
+declare void @f_float(float)
+define void @g_float() {
+; MIPS32-LABEL: g_float:
+; MIPS32:       # %bb.0: # %entry
+; MIPS32-NEXT:    addiu $sp, $sp, -24
+; MIPS32-NEXT:    .cfi_def_cfa_offset 24
+; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    .cfi_offset 31, -4
+; MIPS32-NEXT:    # implicit-def: $f12
+; MIPS32-NEXT:    jal f_float
+; MIPS32-NEXT:    nop
+; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    addiu $sp, $sp, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+entry:
+  call void @f_float(float undef)
+  ret void
+}
+
+declare void @f_double(double)
+define void @g_double() {
+; MIPS32-LABEL: g_double:
+; MIPS32:       # %bb.0: # %entry
+; MIPS32-NEXT:    addiu $sp, $sp, -24
+; MIPS32-NEXT:    .cfi_def_cfa_offset 24
+; MIPS32-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    .cfi_offset 31, -4
+; MIPS32-NEXT:    # implicit-def: $d6
+; MIPS32-NEXT:    jal f_double
+; MIPS32-NEXT:    nop
+; MIPS32-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    addiu $sp, $sp, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+entry:
+  call void @f_double(double undef)
+  ret void
+}
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/implicit_def.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/implicit_def.mir
new file mode 100644
index 00000000000..dc88bb817f7
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/implicit_def.mir
@@ -0,0 +1,110 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+--- |
+
+  declare void @f_i32(i32)
+  define void @g_i32() {entry: ret void}
+
+  declare void @f_i64(i64)
+  define void @g_i64() {entry: ret void}
+
+  declare void @f_float(float)
+  define void @g_float() {entry: ret void}
+
+  declare void @f_double(double)
+  define void @g_double() {entry: ret void}
+
+...
+---
+name:            g_i32
+alignment:       2
+legalized:       true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_i32
+    ; MIPS32: [[DEF:%[0-9]+]]:gprb(s32) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[DEF]](s32)
+    ; MIPS32: JAL @f_i32, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $a0 = COPY %0(s32)
+    JAL @f_i32, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_i64
+alignment:       2
+legalized:       true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_i64
+    ; MIPS32: [[DEF:%[0-9]+]]:gprb(s32) = G_IMPLICIT_DEF
+    ; MIPS32: [[DEF1:%[0-9]+]]:gprb(s32) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $a0 = COPY [[DEF]](s32)
+    ; MIPS32: $a1 = COPY [[DEF1]](s32)
+    ; MIPS32: JAL @f_i64, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s64) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    %1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
+    $a0 = COPY %1(s32)
+    $a1 = COPY %2(s32)
+    JAL @f_i64, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_float
+alignment:       2
+legalized:       true
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_float
+    ; MIPS32: [[DEF:%[0-9]+]]:fprb(s32) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $f12 = COPY [[DEF]](s32)
+    ; MIPS32: JAL @f_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s32) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $f12 = COPY %0(s32)
+    JAL @f_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...
+---
+name:            g_double
+alignment:       2
+legalized:       true
+tracksRegLiveness: true
+registers:
+body:             |
+  bb.1.entry:
+    ; MIPS32-LABEL: name: g_double
+    ; MIPS32: [[DEF:%[0-9]+]]:fprb(s64) = G_IMPLICIT_DEF
+    ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: $d6 = COPY [[DEF]](s64)
+    ; MIPS32: JAL @f_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6
+    ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    ; MIPS32: RetRA
+    %0:_(s64) = G_IMPLICIT_DEF
+    ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+    $d6 = COPY %0(s64)
+    JAL @f_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6
+    ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+    RetRA
+
+...