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| author | Simon Atanasyan <simon@atanasyan.com> | 2018-09-03 20:48:55 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2018-09-03 20:48:55 +0000 |
| commit | 4d13cb0a8a40dd41aa0e3eefc7d9cc5c9ef390aa (patch) | |
| tree | 6cc4080afc51877fa084b76ebb2c17f80c5ce9ed /llvm/test/CodeGen/Mips | |
| parent | dd4a24c86c214f011b62daaf83bfab79607d043f (diff) | |
| download | bcm5719-llvm-4d13cb0a8a40dd41aa0e3eefc7d9cc5c9ef390aa.tar.gz bcm5719-llvm-4d13cb0a8a40dd41aa0e3eefc7d9cc5c9ef390aa.zip | |
[mips] Disable the selection of mixed microMIPS/MIPS code
This patch modifies hasStandardEncoding() / inMicroMipsMode() /
inMips16Mode() methods of the MipsSubtarget class so only one can be
true at any one time. That prevents the selection of microMIPS and MIPS
instructions and patterns that are defined in TableGen files at the same
time. A few new patterns and instruction definitions hae been added to
keep test cases passed.
Differential revision: https://reviews.llvm.org/D51483
llvm-svn: 341338
Diffstat (limited to 'llvm/test/CodeGen/Mips')
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-mtc-mfc.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Mips/micromips-mtc-mfc.ll b/llvm/test/CodeGen/Mips/micromips-mtc-mfc.ll index 084c57ab5d2..1db9337a982 100644 --- a/llvm/test/CodeGen/Mips/micromips-mtc-mfc.ll +++ b/llvm/test/CodeGen/Mips/micromips-mtc-mfc.ll @@ -57,10 +57,9 @@ define double @bar(double %x, double %y) { ; MM6: # %bb.0: # %entry ; MM6-NEXT: cmp.lt.d $f0, $f12, $f14 # encoding: [0x55,0xcc,0x01,0x15] ; MM6-NEXT: mfc1 $1, $f0 # encoding: [0x54,0x20,0x20,0x3b] -; MM6-NEXT: mtc1 $1, $f0 # encoding: [0x44,0x81,0x00,0x00] +; MM6-NEXT: mtc1 $1, $f0 # encoding: [0x54,0x20,0x28,0x3b] ; MM6-NEXT: sel.d $f0, $f14, $f12 # encoding: [0x55,0x8e,0x02,0xb8] ; MM6-NEXT: jrc $ra # encoding: [0x45,0xbf] -; FIXME: mtc1 is encoded as a regular non-microMIPS instruction entry: %z = fcmp olt double %x, %y %r = select i1 %z, double %x, double %y |
