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authorRoman Lebedev <lebedev.ri@gmail.com>2019-09-18 19:34:24 +0000
committerRoman Lebedev <lebedev.ri@gmail.com>2019-09-18 19:34:24 +0000
commit260b6949040985b8c315d080b8e197d0ddcc5dec (patch)
treec5a7f2c618f04cd0dd15d106b9a2f20a72d16dc9 /llvm/test/CodeGen/Mips
parentf71939c0995191bea1adca754e9b7e17f9c1572a (diff)
downloadbcm5719-llvm-260b6949040985b8c315d080b8e197d0ddcc5dec.tar.gz
bcm5719-llvm-260b6949040985b8c315d080b8e197d0ddcc5dec.zip
[CodeGen][MIPS][NFC] Some standalone tests for D66805 "or vectors, select `add %x, C` as `sub %x, -C` if it results in inline immediate"
llvm-svn: 372253
Diffstat (limited to 'llvm/test/CodeGen/Mips')
-rw-r--r--llvm/test/CodeGen/Mips/msa/arithmetic.ll67
1 files changed, 67 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/msa/arithmetic.ll b/llvm/test/CodeGen/Mips/msa/arithmetic.ll
index 413f045662d..2d2b824e7b2 100644
--- a/llvm/test/CodeGen/Mips/msa/arithmetic.ll
+++ b/llvm/test/CodeGen/Mips/msa/arithmetic.ll
@@ -190,6 +190,21 @@ define void @sub_v16i8_i(<16 x i8>* %c, <16 x i8>* %a) nounwind {
ret void
}
+define void @sub_v16i8_i_negated(<16 x i8>* %c, <16 x i8>* %a) nounwind {
+; ALL-LABEL: sub_v16i8_i_negated:
+; ALL: # %bb.0:
+; ALL-NEXT: ld.b $w0, 0($5)
+; ALL-NEXT: ldi.b $w1, -1
+; ALL-NEXT: addv.b $w0, $w0, $w1
+; ALL-NEXT: jr $ra
+; ALL-NEXT: st.b $w0, 0($4)
+ %1 = load <16 x i8>, <16 x i8>* %a
+ %2 = add <16 x i8> %1, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
+ store <16 x i8> %2, <16 x i8>* %c
+ ret void
+}
+
define void @sub_v8i16_i(<8 x i16>* %c, <8 x i16>* %a) nounwind {
; ALL-LABEL: sub_v8i16_i:
; ALL: # %bb.0:
@@ -204,6 +219,21 @@ define void @sub_v8i16_i(<8 x i16>* %c, <8 x i16>* %a) nounwind {
ret void
}
+define void @sub_v8i16_i_negated(<8 x i16>* %c, <8 x i16>* %a) nounwind {
+; ALL-LABEL: sub_v8i16_i_negated:
+; ALL: # %bb.0:
+; ALL-NEXT: ldi.b $w0, -1
+; ALL-NEXT: ld.h $w1, 0($5)
+; ALL-NEXT: addv.h $w0, $w1, $w0
+; ALL-NEXT: jr $ra
+; ALL-NEXT: st.h $w0, 0($4)
+ %1 = load <8 x i16>, <8 x i16>* %a
+ %2 = add <8 x i16> %1, <i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1>
+ store <8 x i16> %2, <8 x i16>* %c
+ ret void
+}
+
define void @sub_v4i32_i(<4 x i32>* %c, <4 x i32>* %a) nounwind {
; ALL-LABEL: sub_v4i32_i:
; ALL: # %bb.0:
@@ -217,6 +247,20 @@ define void @sub_v4i32_i(<4 x i32>* %c, <4 x i32>* %a) nounwind {
ret void
}
+define void @sub_v4i32_i_negated(<4 x i32>* %c, <4 x i32>* %a) nounwind {
+; ALL-LABEL: sub_v4i32_i_negated:
+; ALL: # %bb.0:
+; ALL-NEXT: ldi.b $w0, -1
+; ALL-NEXT: ld.w $w1, 0($5)
+; ALL-NEXT: addv.w $w0, $w1, $w0
+; ALL-NEXT: jr $ra
+; ALL-NEXT: st.w $w0, 0($4)
+ %1 = load <4 x i32>, <4 x i32>* %a
+ %2 = add <4 x i32> %1, <i32 -1, i32 -1, i32 -1, i32 -1>
+ store <4 x i32> %2, <4 x i32>* %c
+ ret void
+}
+
define void @sub_v2i64_i(<2 x i64>* %c, <2 x i64>* %a) nounwind {
; ALL-LABEL: sub_v2i64_i:
; ALL: # %bb.0:
@@ -230,6 +274,29 @@ define void @sub_v2i64_i(<2 x i64>* %c, <2 x i64>* %a) nounwind {
ret void
}
+define void @sub_v2i64_i_negated(<2 x i64>* %c, <2 x i64>* %a) nounwind {
+; MIPS-LABEL: sub_v2i64_i_negated:
+; MIPS: # %bb.0:
+; MIPS-NEXT: ldi.b $w0, -1
+; MIPS-NEXT: shf.w $w0, $w0, 177
+; MIPS-NEXT: ld.d $w1, 0($5)
+; MIPS-NEXT: addv.d $w0, $w1, $w0
+; MIPS-NEXT: jr $ra
+; MIPS-NEXT: st.d $w0, 0($4)
+;
+; MIPSEL-LABEL: sub_v2i64_i_negated:
+; MIPSEL: # %bb.0:
+; MIPSEL-NEXT: ldi.b $w0, -1
+; MIPSEL-NEXT: ld.d $w1, 0($5)
+; MIPSEL-NEXT: addv.d $w0, $w1, $w0
+; MIPSEL-NEXT: jr $ra
+; MIPSEL-NEXT: st.d $w0, 0($4)
+ %1 = load <2 x i64>, <2 x i64>* %a
+ %2 = add <2 x i64> %1, <i64 -1, i64 -1>
+ store <2 x i64> %2, <2 x i64>* %c
+ ret void
+}
+
define void @mul_v16i8(<16 x i8>* %c, <16 x i8>* %a, <16 x i8>* %b) nounwind {
; ALL-LABEL: mul_v16i8:
; ALL: # %bb.0:
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