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authorSanjay Patel <spatel@rotateright.com>2016-10-19 16:58:59 +0000
committerSanjay Patel <spatel@rotateright.com>2016-10-19 16:58:59 +0000
commit3a3aaf67e07ade866b9500a9466086a68d0dd70c (patch)
tree15006d3cec17160af880cfd3669c039ad95dd5ea /llvm/test/CodeGen/Mips/select.ll
parent383803230bba0c0dea3d93d9eb4f97d6fa8f3718 (diff)
downloadbcm5719-llvm-3a3aaf67e07ade866b9500a9466086a68d0dd70c.tar.gz
bcm5719-llvm-3a3aaf67e07ade866b9500a9466086a68d0dd70c.zip
[DAG] optimize negation of bool
Use mask and negate for legalization of i1 source type with SIGN_EXTEND_INREG. With the mask, this should be no worse than 2 shifts. The mask can be eliminated in some cases, so that should be better than 2 shifts. This change exposed some missing folds related to negation: https://reviews.llvm.org/rL284239 https://reviews.llvm.org/rL284395 There may be others, so please let me know if you see any regressions. Differential Revision: https://reviews.llvm.org/D25485 llvm-svn: 284611
Diffstat (limited to 'llvm/test/CodeGen/Mips/select.ll')
-rw-r--r--llvm/test/CodeGen/Mips/select.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/Mips/select.ll b/llvm/test/CodeGen/Mips/select.ll
index 0ef8f36333f..8c1b0286bb5 100644
--- a/llvm/test/CodeGen/Mips/select.ll
+++ b/llvm/test/CodeGen/Mips/select.ll
@@ -140,9 +140,10 @@ entry:
; 32R2-DAG: mtc1 $6, $[[F1:f0]]
; 32R2: movn.s $[[F1]], $[[F0]], $4
+; 32R6: sltu $[[T0:[0-9]+]], $zero, $4
+; 32R6: negu $[[T0]], $[[T0]]
; 32R6-DAG: mtc1 $5, $[[F0:f[0-9]+]]
; 32R6-DAG: mtc1 $6, $[[F1:f[0-9]+]]
-; 32R6: sltu $[[T0:[0-9]+]], $zero, $4
; 32R6: mtc1 $[[T0]], $[[CC:f0]]
; 32R6: sel.s $[[CC]], $[[F1]], $[[F0]]
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