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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
| commit | 22bec282e995ff17b115cb1e94d8042d3b2b920d (patch) | |
| tree | dd37e8b8e05f3fe208e215b8061885d21c431520 /llvm/test/CodeGen/Mips/sb1.ll | |
| parent | e2e091bd596cd3b079815dbb82a6919c04f55aa5 (diff) | |
| download | bcm5719-llvm-22bec282e995ff17b115cb1e94d8042d3b2b920d.tar.gz bcm5719-llvm-22bec282e995ff17b115cb1e94d8042d3b2b920d.zip | |
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
Change these to patterns.
2. Add another 16 instructions.
Patch by Reed Kotler.
llvm-svn: 161272
Diffstat (limited to 'llvm/test/CodeGen/Mips/sb1.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/sb1.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/sb1.ll b/llvm/test/CodeGen/Mips/sb1.ll new file mode 100644 index 00000000000..e1a28d45954 --- /dev/null +++ b/llvm/test/CodeGen/Mips/sb1.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 97, align 4 +@c = common global i8 0, align 1 +@.str = private unnamed_addr constant [8 x i8] c"%i %c \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %conv = trunc i32 %0 to i8 + store i8 %conv, i8* @c, align 1 + %1 = load i32* @i, align 4 + %2 = load i8* @c, align 1 + %conv1 = sext i8 %2 to i32 +; 16: sb ${{[0-9]+}}, 0(${{[0-9]+}}) + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 %1, i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) |
