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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-06-15 08:43:23 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-06-15 08:43:23 +0000 |
| commit | d3bb20821da6ed6dd4e82e33f08ee789f7085d7a (patch) | |
| tree | a696e3732a813b6b71b4f8e097a9ee251b0f7c3f /llvm/test/CodeGen/Mips/msa | |
| parent | d2ed9c6c2c039a1a9c055ffe9bc7e1cf983f8042 (diff) | |
| download | bcm5719-llvm-d3bb20821da6ed6dd4e82e33f08ee789f7085d7a.tar.gz bcm5719-llvm-d3bb20821da6ed6dd4e82e33f08ee789f7085d7a.zip | |
[mips][msa] Fix register/register-class mismatches in emitINSERT_DF_VIDX().
Reviewers: sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D21068
llvm-svn: 272765
Diffstat (limited to 'llvm/test/CodeGen/Mips/msa')
| -rw-r--r-- | llvm/test/CodeGen/Mips/msa/basic_operations.ll | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/Mips/msa/basic_operations.ll b/llvm/test/CodeGen/Mips/msa/basic_operations.ll index 8e89b06f266..b0dcb618c25 100644 --- a/llvm/test/CodeGen/Mips/msa/basic_operations.ll +++ b/llvm/test/CodeGen/Mips/msa/basic_operations.ll @@ -1,9 +1,21 @@ -; RUN: llc -march=mips -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ALL -check-prefix=O32 -check-prefix=MIPS32 -check-prefix=ALL-BE %s -; RUN: llc -march=mipsel -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ALL -check-prefix=O32 -check-prefix=MIPS32 -check-prefix=ALL-LE %s -; RUN: llc -march=mips64 -target-abi n32 -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ALL -check-prefix=N32 -check-prefix=MIPS64 -check-prefix=ALL-BE %s -; RUN: llc -march=mips64el -target-abi n32 -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ALL -check-prefix=N32 -check-prefix=MIPS64 -check-prefix=ALL-LE %s -; RUN: llc -march=mips64 -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ALL -check-prefix=N64 -check-prefix=MIPS64 -check-prefix=ALL-BE %s -; RUN: llc -march=mips64el -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ALL -check-prefix=N64 -check-prefix=MIPS64 -check-prefix=ALL-LE %s +; RUN: llc -march=mips -mattr=+msa,+fp64 -relocation-model=pic \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefix=ALL \ +; RUN: -check-prefix=O32 -check-prefix=MIPS32 -check-prefix=ALL-BE %s +; RUN: llc -march=mipsel -mattr=+msa,+fp64 -relocation-model=pic \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefix=ALL \ +; RUN: -check-prefix=O32 -check-prefix=MIPS32 -check-prefix=ALL-LE %s +; RUN: llc -march=mips64 -target-abi n32 -mattr=+msa,+fp64 \ +; RUN: -relocation-model=pic -verify-machineinstrs < %s | FileCheck \ +; RUN: -check-prefix=ALL -check-prefix=N32 -check-prefix=MIPS64 -check-prefix=ALL-BE %s +; RUN: llc -march=mips64el -target-abi n32 -mattr=+msa,+fp64 \ +; RUN: -relocation-model=pic -verify-machineinstrs < %s | FileCheck \ +; RUN: -check-prefix=ALL -check-prefix=N32 -check-prefix=MIPS64 -check-prefix=ALL-LE %s +; RUN: llc -march=mips64 -mattr=+msa,+fp64 -relocation-model=pic \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefix=ALL \ +; RUN: -check-prefix=N64 -check-prefix=MIPS64 -check-prefix=ALL-BE %s +; RUN: llc -march=mips64el -mattr=+msa,+fp64 -relocation-model=pic \ +; RUN: -verify-machineinstrs < %s | FileCheck -check-prefix=ALL \ +; RUN: -check-prefix=N64 -check-prefix=MIPS64 -check-prefix=ALL-LE %s @v4i8 = global <4 x i8> <i8 0, i8 0, i8 0, i8 0> @v16i8 = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> |
