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authorPetar Jovanovic <petar.jovanovic@imgtec.com>2016-04-11 15:24:23 +0000
committerPetar Jovanovic <petar.jovanovic@imgtec.com>2016-04-11 15:24:23 +0000
commite578e970cb979d000e6b1d734b406aa06d9313d4 (patch)
treee32e2e67dd5a1b37092798050e0cfad321f5eb44 /llvm/test/CodeGen/Mips/msa/vec.ll
parent121571b7ce32513145d0f6d3cd21e45c2f5251b6 (diff)
downloadbcm5719-llvm-e578e970cb979d000e6b1d734b406aa06d9313d4.tar.gz
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[mips] Make Static a default relocation model for MIPS codegen
This change follows up defaults for GCC and Clang, so LLVM does not differ from them. While number of the test files are touched with this change, they all keep the old (expected) behaviour with the explicit option: "-relocation-model=pic" The tests that have not been touched are insensitive to relocation model. Differential Revision: http://reviews.llvm.org/D17995 llvm-svn: 265949
Diffstat (limited to 'llvm/test/CodeGen/Mips/msa/vec.ll')
-rw-r--r--llvm/test/CodeGen/Mips/msa/vec.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Mips/msa/vec.ll b/llvm/test/CodeGen/Mips/msa/vec.ll
index 8790923ce72..f206975990a 100644
--- a/llvm/test/CodeGen/Mips/msa/vec.ll
+++ b/llvm/test/CodeGen/Mips/msa/vec.ll
@@ -1,7 +1,7 @@
; Test the MSA intrinsics that are encoded with the VEC instruction format.
-; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck -check-prefix=ANYENDIAN %s
-; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck -check-prefix=ANYENDIAN %s
+; RUN: llc -march=mips -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ANYENDIAN %s
+; RUN: llc -march=mipsel -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefix=ANYENDIAN %s
@llvm_mips_and_v_b_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
@llvm_mips_and_v_b_ARG2 = global <16 x i8> <i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, align 16
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