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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-04 13:54:30 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-04 13:54:30 +0000 |
commit | d920770addd99f7cdc8c6e0f817ca807ea932ba1 (patch) | |
tree | 7bfb4c3630376dad40ce368778643c3aa09bffe0 /llvm/test/CodeGen/Mips/msa/basic_operations_float.ll | |
parent | d964e7cd81d31390af1fad06b0c4a7bbc4199b8e (diff) | |
download | bcm5719-llvm-d920770addd99f7cdc8c6e0f817ca807ea932ba1.tar.gz bcm5719-llvm-d920770addd99f7cdc8c6e0f817ca807ea932ba1.zip |
[mips][msa] Correct the behaviour of the COPY_FW pseudo on lanes 2 and 3.
Summary:
Previously, attempting to extract lanes 2 and 3 would actually extract lane 1.
The MSA CodeGen tests only covered lanes 0 and 1.
Differential Revision: http://llvm-reviews.chandlerc.com/D2935
llvm-svn: 202848
Diffstat (limited to 'llvm/test/CodeGen/Mips/msa/basic_operations_float.ll')
-rw-r--r-- | llvm/test/CodeGen/Mips/msa/basic_operations_float.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/msa/basic_operations_float.ll b/llvm/test/CodeGen/Mips/msa/basic_operations_float.ll index a405e1b6de5..c8cef449096 100644 --- a/llvm/test/CodeGen/Mips/msa/basic_operations_float.ll +++ b/llvm/test/CodeGen/Mips/msa/basic_operations_float.ll @@ -137,6 +137,24 @@ define float @extract_v4f32_elt0() nounwind { ; MIPS32: .size extract_v4f32_elt0 } +define float @extract_v4f32_elt2() nounwind { + ; MIPS32: extract_v4f32_elt2: + + %1 = load <4 x float>* @v4f32 + ; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]], + + %2 = fadd <4 x float> %1, %1 + ; MIPS32-DAG: fadd.w [[R2:\$w[0-9]+]], [[R1]], [[R1]] + + %3 = extractelement <4 x float> %2, i32 2 + ; Element 2 can be obtained by splatting it across the vector and extracting + ; $w0:sub_lo + ; MIPS32-DAG: splati.w $w0, [[R1]][2] + + ret float %3 + ; MIPS32: .size extract_v4f32_elt2 +} + define double @extract_v2f64() nounwind { ; MIPS32: extract_v2f64: |