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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-11-05 15:46:53 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-11-05 15:46:53 +0000 |
| commit | f4f5f1e272a33a34cb5b7e00a10f2399d1c75f17 (patch) | |
| tree | 225eafe2b42e42f664017ec4ed129de376a866c7 /llvm/test/CodeGen/Mips/micromips-shift.ll | |
| parent | e548bb06349aedc248aae9a8785fa0963cc9ace0 (diff) | |
| download | bcm5719-llvm-f4f5f1e272a33a34cb5b7e00a10f2399d1c75f17.tar.gz bcm5719-llvm-f4f5f1e272a33a34cb5b7e00a10f2399d1c75f17.zip | |
[mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
Differential Revision: http://reviews.llvm.org/D5933
llvm-svn: 221352
Diffstat (limited to 'llvm/test/CodeGen/Mips/micromips-shift.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-shift.ll | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/micromips-shift.ll b/llvm/test/CodeGen/Mips/micromips-shift.ll new file mode 100644 index 00000000000..8215010bfc7 --- /dev/null +++ b/llvm/test/CodeGen/Mips/micromips-shift.ll @@ -0,0 +1,44 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ +; RUN: -relocation-model=pic -O3 < %s | FileCheck %s + +@a = global i32 10, align 4 +@b = global i32 0, align 4 +@c = global i32 10, align 4 +@d = global i32 0, align 4 + +define i32 @shift_left() nounwind { +entry: + %0 = load i32* @a, align 4 + %shl = shl i32 %0, 4 + store i32 %shl, i32* @b, align 4 + + %1 = load i32* @c, align 4 + %shl1 = shl i32 %1, 10 + store i32 %shl1, i32* @d, align 4 + + ret i32 0 +} + +; CHECK: sll16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}} +; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + +@i = global i32 10654, align 4 +@j = global i32 0, align 4 +@m = global i32 10, align 4 +@n = global i32 0, align 4 + +define i32 @shift_right() nounwind { +entry: + %0 = load i32* @i, align 4 + %shr = lshr i32 %0, 4 + store i32 %shr, i32* @j, align 4 + + %1 = load i32* @m, align 4 + %shr1 = lshr i32 %1, 10 + store i32 %shr1, i32* @n, align 4 + + ret i32 0 +} + +; CHECK: srl16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}} +; CHECK: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} |
