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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-01-18 19:29:17 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-01-18 19:29:17 +0000
commit4dc73fa075db86bc6a07d755d972e9f8ad7336cc (patch)
tree0a37026ae05f8361cdd70471c46fcb0a5054bd28 /llvm/test/CodeGen/Mips/madd-msub.ll
parente84389bf68105d8b03447ad94dad8bee2b577ec8 (diff)
downloadbcm5719-llvm-4dc73fa075db86bc6a07d755d972e9f8ad7336cc.tar.gz
bcm5719-llvm-4dc73fa075db86bc6a07d755d972e9f8ad7336cc.zip
Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka
llvm-svn: 123760
Diffstat (limited to 'llvm/test/CodeGen/Mips/madd-msub.ll')
-rw-r--r--llvm/test/CodeGen/Mips/madd-msub.ll65
1 files changed, 65 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/madd-msub.ll b/llvm/test/CodeGen/Mips/madd-msub.ll
new file mode 100644
index 00000000000..4a205b1f3ff
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/madd-msub.ll
@@ -0,0 +1,65 @@
+; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s
+
+; CHECK: madd $5, $4
+define i64 @madd1(i32 %a, i32 %b, i32 %c) nounwind readnone {
+entry:
+ %conv = sext i32 %a to i64
+ %conv2 = sext i32 %b to i64
+ %mul = mul nsw i64 %conv2, %conv
+ %conv4 = sext i32 %c to i64
+ %add = add nsw i64 %mul, %conv4
+ ret i64 %add
+}
+
+; CHECK: maddu $5, $4
+define i64 @madd2(i32 %a, i32 %b, i32 %c) nounwind readnone {
+entry:
+ %conv = zext i32 %a to i64
+ %conv2 = zext i32 %b to i64
+ %mul = mul nsw i64 %conv2, %conv
+ %conv4 = zext i32 %c to i64
+ %add = add nsw i64 %mul, %conv4
+ ret i64 %add
+}
+
+; CHECK: madd $5, $4
+define i64 @madd3(i32 %a, i32 %b, i64 %c) nounwind readnone {
+entry:
+ %conv = sext i32 %a to i64
+ %conv2 = sext i32 %b to i64
+ %mul = mul nsw i64 %conv2, %conv
+ %add = add nsw i64 %mul, %c
+ ret i64 %add
+}
+
+; CHECK: msub $5, $4
+define i64 @msub1(i32 %a, i32 %b, i32 %c) nounwind readnone {
+entry:
+ %conv = sext i32 %c to i64
+ %conv2 = sext i32 %a to i64
+ %conv4 = sext i32 %b to i64
+ %mul = mul nsw i64 %conv4, %conv2
+ %sub = sub nsw i64 %conv, %mul
+ ret i64 %sub
+}
+
+; CHECK: msubu $5, $4
+define i64 @msub2(i32 %a, i32 %b, i32 %c) nounwind readnone {
+entry:
+ %conv = zext i32 %c to i64
+ %conv2 = zext i32 %a to i64
+ %conv4 = zext i32 %b to i64
+ %mul = mul nsw i64 %conv4, %conv2
+ %sub = sub nsw i64 %conv, %mul
+ ret i64 %sub
+}
+
+; CHECK: msub $5, $4
+define i64 @msub3(i32 %a, i32 %b, i64 %c) nounwind readnone {
+entry:
+ %conv = sext i32 %a to i64
+ %conv3 = sext i32 %b to i64
+ %mul = mul nsw i64 %conv3, %conv
+ %sub = sub nsw i64 %c, %mul
+ ret i64 %sub
+}
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