summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Mips/llvm-ir
diff options
context:
space:
mode:
authorZlatko Buljan <Zlatko.Buljan@imgtec.com>2016-05-18 06:54:59 +0000
committerZlatko Buljan <Zlatko.Buljan@imgtec.com>2016-05-18 06:54:59 +0000
commit6afea51a58e7b8603c8ff696d04291afc7f0b35e (patch)
tree422f4882374df90af27ce54dc4e00ed35b841c05 /llvm/test/CodeGen/Mips/llvm-ir
parent7bec3a94c62bab3add2cef80aaace9cbe60a0cb3 (diff)
downloadbcm5719-llvm-6afea51a58e7b8603c8ff696d04291afc7f0b35e.tar.gz
bcm5719-llvm-6afea51a58e7b8603c8ff696d04291afc7f0b35e.zip
[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support
Differential Revision: http://reviews.llvm.org/D15418 llvm-svn: 269883
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir')
-rw-r--r--llvm/test/CodeGen/Mips/llvm-ir/lh_lhu.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/lh_lhu.ll b/llvm/test/CodeGen/Mips/llvm-ir/lh_lhu.ll
new file mode 100644
index 00000000000..85527b3cd85
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/llvm-ir/lh_lhu.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s
+
+@us = global i16 0, align 2
+
+define i32 @lhfunc() {
+entry:
+; CHECK-LABEL: lhfunc
+; CHECK: lh $[[REG1:[0-9]+]], 0(${{[0-9]+}})
+ %0 = load i16, i16* @us, align 2
+ %conv = sext i16 %0 to i32
+ ret i32 %conv
+}
+
+define i16 @lhfunc_atomic() {
+entry:
+; CHECK-LABEL: lhfunc_atomic
+; CHECK: lh $[[REG1:[0-9]+]], 0(${{[0-9]+}})
+ %0 = load atomic i16, i16* @us acquire, align 2
+ ret i16 %0
+}
+
+define i32 @lhufunc() {
+entry:
+; CHECK-LABEL: lhufunc
+; CHECK: lhu $[[REG1:[0-9]+]], 0(${{[0-9]+}})
+ %0 = load i16, i16* @us, align 2
+ %conv = zext i16 %0 to i32
+ ret i32 %conv
+}
OpenPOWER on IntegriCloud