[mips] Sign extend i32 return values on MIPS64

Override getTypeForExtReturn so that functions returning
an i32 typed value have it sign extended on MIPS64.

Also provide patterns to get rid of unneeded sign extensions
for arithmetic instructions which implicitly sign extend
their results.

Differential Revision: https://reviews.llvm.org/D48374

llvm-svn: 338019

5 files changed, 33 insertions, 28 deletions

diff --git a/llvm/test/CodeGen/Mips/llvm-ir/and.ll b/llvm/test/CodeGen/Mips/llvm-ir/and.ll
index cc361367001..87f7edb2b71 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/and.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/and.ll
@@ -195,21 +195,18 @@ define signext i32 @and_i32(i32 signext %a, i32 signext %b) {
 ;
 ; MIPS64-LABEL: and_i32:
 ; MIPS64:       # %bb.0: # %entry
-; MIPS64-NEXT:    and $1, $4, $5
 ; MIPS64-NEXT:    jr $ra
-; MIPS64-NEXT:    sll $2, $1, 0
+; MIPS64-NEXT:    and $2, $4, $5
 ;
 ; MIPS64R2-LABEL: and_i32:
 ; MIPS64R2:       # %bb.0: # %entry
-; MIPS64R2-NEXT:    and $1, $4, $5
 ; MIPS64R2-NEXT:    jr $ra
-; MIPS64R2-NEXT:    sll $2, $1, 0
+; MIPS64R2-NEXT:    and $2, $4, $5
 ;
 ; MIPS64R6-LABEL: and_i32:
 ; MIPS64R6:       # %bb.0: # %entry
-; MIPS64R6-NEXT:    and $1, $4, $5
 ; MIPS64R6-NEXT:    jr $ra
-; MIPS64R6-NEXT:    sll $2, $1, 0
+; MIPS64R6-NEXT:    and $2, $4, $5
 ;
 ; MM32R3-LABEL: and_i32:
 ; MM32R3:       # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/not.ll b/llvm/test/CodeGen/Mips/llvm-ir/not.ll
index 6a27612c0e2..03ba8e562ef 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/not.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/not.ll
@@ -75,7 +75,8 @@ entry:
 
   ; GP32:         not     $2, $4
 
-  ; GP64:         not     $2, $4
+  ; GP64:         not     $1, $4
+  ; GP64:         sll     $2, $1, 0
 
   ; MM:           not16   $2, $4
 
@@ -169,7 +170,8 @@ entry:
 
   ; GP64:         or      $[[T0:[0-9]+]], $5, $4
   ; GP64:         sll     $[[T1:[0-9]+]], $[[T0]], 0
-  ; GP64:         not     $2, $[[T1]]
+  ; GP64:         not     $[[T2:[0-9]+]], $[[T1]]
+  ; GP64:         sll     $2, $[[T2]], 0
 
   ; MM32:         nor     $2, $5, $4
 
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/or.ll b/llvm/test/CodeGen/Mips/llvm-ir/or.ll
index ce22f08385b..c595ff42086 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/or.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/or.ll
@@ -106,9 +106,8 @@ define signext i32 @or_i32(i32 signext %a, i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32:
 ; GP64:       # %bb.0: # %entry
-; GP64-NEXT:    or $1, $4, $5
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    sll $2, $1, 0
+; GP64-NEXT:    or $2, $4, $5
 ;
 ; MM32-LABEL: or_i32:
 ; MM32:       # %bb.0: # %entry
@@ -284,8 +283,9 @@ define signext i32 @or_i32_4(i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32_4:
 ; GP64:       # %bb.0: # %entry
+; GP64-NEXT:    ori $1, $4, 4
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    ori $2, $4, 4
+; GP64-NEXT:    sll $2, $1, 0
 ;
 ; MM32-LABEL: or_i32_4:
 ; MM32:       # %bb.0: # %entry
@@ -450,8 +450,9 @@ define signext i32 @or_i32_31(i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32_31:
 ; GP64:       # %bb.0: # %entry
+; GP64-NEXT:    ori $1, $4, 31
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    ori $2, $4, 31
+; GP64-NEXT:    sll $2, $1, 0
 ;
 ; MM32-LABEL: or_i32_31:
 ; MM32:       # %bb.0: # %entry
@@ -616,8 +617,9 @@ define signext i32 @or_i32_255(i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32_255:
 ; GP64:       # %bb.0: # %entry
+; GP64-NEXT:    ori $1, $4, 255
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    ori $2, $4, 255
+; GP64-NEXT:    sll $2, $1, 0
 ;
 ; MM32-LABEL: or_i32_255:
 ; MM32:       # %bb.0: # %entry
@@ -786,8 +788,9 @@ define signext i32 @or_i32_32768(i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32_32768:
 ; GP64:       # %bb.0: # %entry
+; GP64-NEXT:    ori $1, $4, 32768
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    ori $2, $4, 32768
+; GP64-NEXT:    sll $2, $1, 0
 ;
 ; MM32-LABEL: or_i32_32768:
 ; MM32:       # %bb.0: # %entry
@@ -952,8 +955,9 @@ define signext i32 @or_i32_65(i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32_65:
 ; GP64:       # %bb.0: # %entry
+; GP64-NEXT:    ori $1, $4, 65
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    ori $2, $4, 65
+; GP64-NEXT:    sll $2, $1, 0
 ;
 ; MM32-LABEL: or_i32_65:
 ; MM32:       # %bb.0: # %entry
@@ -1118,8 +1122,9 @@ define signext i32 @or_i32_256(i32 signext %b) {
 ;
 ; GP64-LABEL: or_i32_256:
 ; GP64:       # %bb.0: # %entry
+; GP64-NEXT:    ori $1, $4, 256
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    ori $2, $4, 256
+; GP64-NEXT:    sll $2, $1, 0
 ;
 ; MM32-LABEL: or_i32_256:
 ; MM32:       # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll b/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
index 5d20a3cb9b7..d07051f05e1 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
@@ -113,16 +113,17 @@ entry:
   ; M2-M3:  move    $5, $6
   ; M2-M3:  [[BB0]]:
   ; M2-M3:  jr      $ra
-  ; M2-M3:  move    $2, $5
+  ; M3:     sll     $2, $5, 0
 
   ; CMOV:   andi    $[[T0:[0-9]+]], $4, 1
   ; CMOV:   movn    $6, $5, $[[T0]]
-  ; CMOV:   move    $2, $6
+  ; CMOV-64:sll     $2, $6, 0
 
   ; SEL:    andi    $[[T0:[0-9]+]], $4, 1
   ; SEL:    seleqz  $[[T1:[0-9]+]], $6, $[[T0]]
   ; SEL:    selnez  $[[T2:[0-9]+]], $5, $[[T0]]
-  ; SEL:    or      $2, $[[T2]], $[[T1]]
+  ; SEL:    or      $[[T3:[0-9]+]], $[[T2]], $[[T1]]
+  ; SEL-64: sll     $2, $[[T3]], 0
 
   ; MM32R3:     andi16  $[[T0:[0-9]+]], $4, 1
   ; MM32R3:     movn    $[[T1:[0-9]+]], $5, $[[T0]]  # <MCInst #{{[0-9]+}} MOVN_I_MM
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/xor.ll b/llvm/test/CodeGen/Mips/llvm-ir/xor.ll
index 54bb179b117..972e3b6685a 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/xor.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/xor.ll
@@ -193,21 +193,18 @@ define signext i32 @xor_i32(i32 signext %a, i32 signext %b) {
 ;
 ; MIPS64-LABEL: xor_i32:
 ; MIPS64:       # %bb.0: # %entry
-; MIPS64-NEXT:    xor $1, $4, $5
 ; MIPS64-NEXT:    jr $ra
-; MIPS64-NEXT:    sll $2, $1, 0
+; MIPS64-NEXT:    xor $2, $4, $5
 ;
 ; MIPS64R2-LABEL: xor_i32:
 ; MIPS64R2:       # %bb.0: # %entry
-; MIPS64R2-NEXT:    xor $1, $4, $5
 ; MIPS64R2-NEXT:    jr $ra
-; MIPS64R2-NEXT:    sll $2, $1, 0
+; MIPS64R2-NEXT:    xor $2, $4, $5
 ;
 ; MIPS64R6-LABEL: xor_i32:
 ; MIPS64R6:       # %bb.0: # %entry
-; MIPS64R6-NEXT:    xor $1, $4, $5
 ; MIPS64R6-NEXT:    jr $ra
-; MIPS64R6-NEXT:    sll $2, $1, 0
+; MIPS64R6-NEXT:    xor $2, $4, $5
 ;
 ; MM32R3-LABEL: xor_i32:
 ; MM32R3:       # %bb.0: # %entry
@@ -511,18 +508,21 @@ define signext i32 @xor_i32_4(i32 signext %b) {
 ;
 ; MIPS64-LABEL: xor_i32_4:
 ; MIPS64:       # %bb.0: # %entry
+; MIPS64-NEXT:    xori $1, $4, 4
 ; MIPS64-NEXT:    jr $ra
-; MIPS64-NEXT:    xori $2, $4, 4
+; MIPS64-NEXT:    sll $2, $1, 0
 ;
 ; MIPS64R2-LABEL: xor_i32_4:
 ; MIPS64R2:       # %bb.0: # %entry
+; MIPS64R2-NEXT:    xori $1, $4, 4
 ; MIPS64R2-NEXT:    jr $ra
-; MIPS64R2-NEXT:    xori $2, $4, 4
+; MIPS64R2-NEXT:    sll $2, $1, 0
 ;
 ; MIPS64R6-LABEL: xor_i32_4:
 ; MIPS64R6:       # %bb.0: # %entry
+; MIPS64R6-NEXT:    xori $1, $4, 4
 ; MIPS64R6-NEXT:    jr $ra
-; MIPS64R6-NEXT:    xori $2, $4, 4
+; MIPS64R6-NEXT:    sll $2, $1, 0
 ;
 ; MM32R3-LABEL: xor_i32_4:
 ; MM32R3:       # %bb.0: # %entry