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| author | Sanjay Patel <spatel@rotateright.com> | 2017-10-09 15:22:20 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-10-09 15:22:20 +0000 |
| commit | 2a61a821a0fe1270dbf12778972910cb9a8dadcb (patch) | |
| tree | 8bf4ac3f380abfda4cefffff22a2a9d1126b989d /llvm/test/CodeGen/Mips/llvm-ir | |
| parent | 24ca39ce71e6312672f58d311b6bb6af727f9ca7 (diff) | |
| download | bcm5719-llvm-2a61a821a0fe1270dbf12778972910cb9a8dadcb.tar.gz bcm5719-llvm-2a61a821a0fe1270dbf12778972910cb9a8dadcb.zip | |
[DAG] combine assertsexts around a trunc
This was a suggested follow-up to:
D37017 / https://reviews.llvm.org/rL313577
llvm-svn: 315206
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir')
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/and.ll | 24 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/not.ll | 15 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/or.ll | 24 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/xor.ll | 24 |
4 files changed, 57 insertions, 30 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/and.ll b/llvm/test/CodeGen/Mips/llvm-ir/and.ll index c26b60d0ff9..18d7a439f62 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/and.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/and.ll @@ -37,10 +37,12 @@ entry: ; GP32: and $2, $4, $5 - ; GP64: and $2, $4, $5 + ; GP64: and $1, $4, $5 + + ; MM32: and16 $[[T0:[0-9]+]], $5 + ; MM32: move $2, $[[T0]] - ; MM: and16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: and $1, $4, $5 %r = and i1 %a, %b ret i1 %r @@ -52,10 +54,12 @@ entry: ; GP32: and $2, $4, $5 - ; GP64: and $2, $4, $5 + ; GP64: and $1, $4, $5 - ; MM: and16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM32: and16 $[[T0:[0-9]+]], $5 + ; MM32: move $2, $[[T0]] + + ; MM64: and $1, $4, $5 %r = and i8 %a, %b ret i8 %r @@ -67,10 +71,12 @@ entry: ; GP32: and $2, $4, $5 - ; GP64: and $2, $4, $5 + ; GP64: and $1, $4, $5 + + ; MM32: and16 $[[T0:[0-9]+]], $5 + ; MM32 move $2, $[[T0]] - ; MM: and16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: and $1, $4, $5 %r = and i16 %a, %b ret i16 %r diff --git a/llvm/test/CodeGen/Mips/llvm-ir/not.ll b/llvm/test/CodeGen/Mips/llvm-ir/not.ll index 914b6164ad0..ab7a3c4613a 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/not.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/not.ll @@ -135,7 +135,10 @@ define signext i1 @nor_i1(i1 signext %a, i1 signext %b) { entry: ; ALL-LABEL: nor_i1: - ; ALL: nor $2, $5, $4 + ; GP32: nor $2, $5, $4 + ; GP64: or $1, $5, $4 + ; MM32: nor $2, $5, $4 + ; MM64: or $1, $5, $4 %or = or i1 %b, %a %r = xor i1 %or, -1 @@ -146,7 +149,10 @@ define signext i8 @nor_i8(i8 signext %a, i8 signext %b) { entry: ; ALL-LABEL: nor_i8: - ; ALL: nor $2, $5, $4 + ; GP32: nor $2, $5, $4 + ; GP64: or $1, $5, $4 + ; MM32: nor $2, $5, $4 + ; MM64: or $1, $5, $4 %or = or i8 %b, %a %r = xor i8 %or, -1 @@ -157,7 +163,10 @@ define signext i16 @nor_i16(i16 signext %a, i16 signext %b) { entry: ; ALL-LABEL: nor_i16: - ; ALL: nor $2, $5, $4 + ; GP32: nor $2, $5, $4 + ; GP64: or $1, $5, $4 + ; MM32: nor $2, $5, $4 + ; MM64: or $1, $5, $4 %or = or i16 %b, %a %r = xor i16 %or, -1 diff --git a/llvm/test/CodeGen/Mips/llvm-ir/or.ll b/llvm/test/CodeGen/Mips/llvm-ir/or.ll index c7f89ef5d22..609cf0210c3 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/or.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/or.ll @@ -24,10 +24,12 @@ entry: ; GP32: or $2, $4, $5 - ; GP64: or $2, $4, $5 + ; GP64: or $1, $4, $5 + + ; MM32: or16 $[[T0:[0-9]+]], $5 + ; MM32 move $2, $[[T0]] - ; MM: or16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: or $1, $4, $5 %r = or i1 %a, %b ret i1 %r @@ -39,10 +41,12 @@ entry: ; GP32: or $2, $4, $5 - ; GP64: or $2, $4, $5 + ; GP64: or $1, $4, $5 - ; MM: or16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM32: or16 $[[T0:[0-9]+]], $5 + ; MM32 move $2, $[[T0]] + + ; MM64: or $1, $4, $5 %r = or i8 %a, %b ret i8 %r @@ -54,10 +58,12 @@ entry: ; GP32: or $2, $4, $5 - ; GP64: or $2, $4, $5 + ; GP64: or $1, $4, $5 + + ; MM32: or16 $[[T0:[0-9]+]], $5 + ; MM32 move $2, $[[T0]] - ; MM: or16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: or $1, $4, $5 %r = or i16 %a, %b ret i16 %r diff --git a/llvm/test/CodeGen/Mips/llvm-ir/xor.ll b/llvm/test/CodeGen/Mips/llvm-ir/xor.ll index 1d45e200a2e..068d390839d 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/xor.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/xor.ll @@ -35,10 +35,12 @@ entry: ; GP32: xor $2, $4, $5 - ; GP64: xor $2, $4, $5 + ; GP64: xor $1, $4, $5 + + ; MM32: xor16 $[[T0:[0-9]+]], $5 + ; MM32: move $2, $[[T0]] - ; MM: xor16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: xor $1, $4, $5 %r = xor i1 %a, %b ret i1 %r @@ -50,10 +52,12 @@ entry: ; GP32: xor $2, $4, $5 - ; GP64: xor $2, $4, $5 + ; GP64: xor $1, $4, $5 + + ; MM32: xor16 $[[T0:[0-9]+]], $5 + ; MM32: move $2, $[[T0]] - ; MM: xor16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: xor $1, $4, $5 %r = xor i8 %a, %b ret i8 %r @@ -65,10 +69,12 @@ entry: ; GP32: xor $2, $4, $5 - ; GP64: xor $2, $4, $5 + ; GP64: xor $1, $4, $5 + + ; MM32: xor16 $[[T0:[0-9]+]], $5 + ; MM32: move $2, $[[T0]] - ; MM: xor16 $[[T0:[0-9]+]], $5 - ; MM: move $2, $[[T0]] + ; MM64: xor $1, $4, $5 %r = xor i16 %a, %b ret i16 %r |
