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| author | Hans Wennborg <hans@hanshq.net> | 2017-08-30 22:11:37 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@hanshq.net> | 2017-08-30 22:11:37 +0000 |
| commit | 24775a0a6ccfeae5e091b5e9990cb910913c2963 (patch) | |
| tree | 1d3e32a5884e595573fc1f5d2c45060ac1358c09 /llvm/test/CodeGen/Mips/llvm-ir | |
| parent | 01d026510630203b1217a0d5550a86e6eaa05b12 (diff) | |
| download | bcm5719-llvm-24775a0a6ccfeae5e091b5e9990cb910913c2963.tar.gz bcm5719-llvm-24775a0a6ccfeae5e091b5e9990cb910913c2963.zip | |
Revert r312154 "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""
It caused PR34387: Assertion failed: (RegNo < NumRegs && "Attempting to access record for invalid register number!")
> Issues identified by buildbots addressed since original review:
> - Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907.
> - The pass no longer forwards COPYs to physical register uses, since
> doing so can break code that implicitly relies on the physical
> register number of the use.
> - The pass no longer forwards COPYs to undef uses, since doing so
> can break the machine verifier by creating LiveRanges that don't
> end on a use (since the undef operand is not considered a use).
>
> [MachineCopyPropagation] Extend pass to do COPY source forwarding
>
> This change extends MachineCopyPropagation to do COPY source forwarding.
>
> This change also extends the MachineCopyPropagation pass to be able to
> be run during register allocation, after physical registers have been
> assigned, but before the virtual registers have been re-written, which
> allows it to remove virtual register COPY LiveIntervals that become dead
> through the forwarding of all of their uses.
llvm-svn: 312178
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir')
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/sub.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/sub.ll b/llvm/test/CodeGen/Mips/llvm-ir/sub.ll index 8cf2d9eeb8e..655addb10a6 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/sub.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/sub.ll @@ -165,7 +165,7 @@ entry: ; MMR3: subu16 $5, $[[T19]], $[[T20]] ; MMR6: move $[[T0:[0-9]+]], $7 -; MMR6: sw $7, 8($sp) +; MMR6: sw $[[T0]], 8($sp) ; MMR6: move $[[T1:[0-9]+]], $5 ; MMR6: sw $4, 12($sp) ; MMR6: lw $[[T2:[0-9]+]], 48($sp) |
