diff options
| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-02-23 08:30:15 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-02-23 08:30:15 +0000 |
| commit | 07d6aea61af9d69a1f230489207713f0d49efe08 (patch) | |
| tree | ca466985779c3f39c7e25a4abb221fd3d485024a /llvm/test/CodeGen/Mips/llvm-ir | |
| parent | ff52eb5927e1045c042a8e442960de9c49b1935e (diff) | |
| download | bcm5719-llvm-07d6aea61af9d69a1f230489207713f0d49efe08.tar.gz bcm5719-llvm-07d6aea61af9d69a1f230489207713f0d49efe08.zip | |
[Mips] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.
Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.
Review: Simon Dardis
llvm-svn: 325870
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir')
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll | 266 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll | 266 |
2 files changed, 278 insertions, 254 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll b/llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll index 40d74157ab8..715c35fdfe3 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll @@ -76,19 +76,19 @@ define double @tst_select_i1_double(i1 signext %s, double %x, double %y) { ; M3: # %bb.0: # %entry ; M3-NEXT: andi $1, $4, 1 ; M3-NEXT: bnez $1, .LBB0_2 -; M3-NEXT: nop +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f13, $f14 +; M3-NEXT: mov.d $f0, $f14 ; M3-NEXT: .LBB0_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f13 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_i1_double: ; CMOV64: # %bb.0: # %entry +; CMOV64-NEXT: mov.d $f0, $f14 ; CMOV64-NEXT: andi $1, $4, 1 -; CMOV64-NEXT: movn.d $f14, $f13, $1 ; CMOV64-NEXT: jr $ra -; CMOV64-NEXT: mov.d $f0, $f14 +; CMOV64-NEXT: movn.d $f0, $f13, $1 ; ; 64R6-LABEL: tst_select_i1_double: ; 64R6: # %bb.0: # %entry @@ -124,28 +124,28 @@ define double @tst_select_i1_double_reordered(double %x, double %y, ; M2-NEXT: lw $1, 16($sp) ; M2-NEXT: andi $1, $1, 1 ; M2-NEXT: bnez $1, $BB1_2 -; M2-NEXT: nop +; M2-NEXT: mov.d $f0, $f12 ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB1_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_i1_double_reordered: ; CMOV32R1: # %bb.0: # %entry +; CMOV32R1-NEXT: mov.d $f0, $f14 ; CMOV32R1-NEXT: lw $1, 16($sp) ; CMOV32R1-NEXT: andi $1, $1, 1 -; CMOV32R1-NEXT: movn.d $f14, $f12, $1 ; CMOV32R1-NEXT: jr $ra -; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: movn.d $f0, $f12, $1 ; ; CMOV32R2-LABEL: tst_select_i1_double_reordered: ; CMOV32R2: # %bb.0: # %entry +; CMOV32R2-NEXT: mov.d $f0, $f14 ; CMOV32R2-NEXT: lw $1, 16($sp) ; CMOV32R2-NEXT: andi $1, $1, 1 -; CMOV32R2-NEXT: movn.d $f14, $f12, $1 ; CMOV32R2-NEXT: jr $ra -; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: movn.d $f0, $f12, $1 ; ; 32R6-LABEL: tst_select_i1_double_reordered: ; 32R6: # %bb.0: # %entry @@ -158,19 +158,19 @@ define double @tst_select_i1_double_reordered(double %x, double %y, ; M3: # %bb.0: # %entry ; M3-NEXT: andi $1, $6, 1 ; M3-NEXT: bnez $1, .LBB1_2 -; M3-NEXT: nop +; M3-NEXT: mov.d $f0, $f12 ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB1_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_i1_double_reordered: ; CMOV64: # %bb.0: # %entry +; CMOV64-NEXT: mov.d $f0, $f13 ; CMOV64-NEXT: andi $1, $6, 1 -; CMOV64-NEXT: movn.d $f13, $f12, $1 ; CMOV64-NEXT: jr $ra -; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: movn.d $f0, $f12, $1 ; ; 64R6-LABEL: tst_select_i1_double_reordered: ; 64R6: # %bb.0: # %entry @@ -180,11 +180,11 @@ define double @tst_select_i1_double_reordered(double %x, double %y, ; ; MM32R3-LABEL: tst_select_i1_double_reordered: ; MM32R3: # %bb.0: # %entry +; MM32R3-NEXT: mov.d $f0, $f14 ; MM32R3-NEXT: lw $2, 16($sp) ; MM32R3-NEXT: andi16 $2, $2, 1 -; MM32R3-NEXT: movn.d $f14, $f12, $2 ; MM32R3-NEXT: jr $ra -; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: movn.d $f0, $f12, $2 ; ; MM32R6-LABEL: tst_select_i1_double_reordered: ; MM32R6: # %bb.0: # %entry @@ -201,28 +201,29 @@ entry: define double @tst_select_fcmp_olt_double(double %x, double %y) { ; M2-LABEL: tst_select_fcmp_olt_double: ; M2: # %bb.0: # %entry -; M2-NEXT: c.olt.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: c.olt.d $f0, $f14 ; M2-NEXT: bc1t $BB2_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB2_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_olt_double: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.olt.d $f12, $f14 -; CMOV32R1-NEXT: movt.d $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: c.olt.d $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movt.d $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_olt_double: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.olt.d $f12, $f14 -; CMOV32R2-NEXT: movt.d $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: c.olt.d $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movt.d $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_olt_double: ; 32R6: # %bb.0: # %entry @@ -234,21 +235,22 @@ define double @tst_select_fcmp_olt_double(double %x, double %y) { ; ; M3-LABEL: tst_select_fcmp_olt_double: ; M3: # %bb.0: # %entry -; M3-NEXT: c.olt.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: c.olt.d $f0, $f13 ; M3-NEXT: bc1t .LBB2_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB2_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_olt_double: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.olt.d $f12, $f13 -; CMOV64-NEXT: movt.d $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: c.olt.d $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movt.d $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_olt_double: ; 64R6: # %bb.0: # %entry @@ -260,10 +262,10 @@ define double @tst_select_fcmp_olt_double(double %x, double %y) { ; ; MM32R3-LABEL: tst_select_fcmp_olt_double: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.olt.d $f12, $f14 -; MM32R3-NEXT: movt.d $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: c.olt.d $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movt.d $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_olt_double: ; MM32R6: # %bb.0: # %entry @@ -281,28 +283,29 @@ entry: define double @tst_select_fcmp_ole_double(double %x, double %y) { ; M2-LABEL: tst_select_fcmp_ole_double: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ole.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: c.ole.d $f0, $f14 ; M2-NEXT: bc1t $BB3_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB3_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_ole_double: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ole.d $f12, $f14 -; CMOV32R1-NEXT: movt.d $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: c.ole.d $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movt.d $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_ole_double: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ole.d $f12, $f14 -; CMOV32R2-NEXT: movt.d $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: c.ole.d $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movt.d $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_ole_double: ; 32R6: # %bb.0: # %entry @@ -314,21 +317,22 @@ define double @tst_select_fcmp_ole_double(double %x, double %y) { ; ; M3-LABEL: tst_select_fcmp_ole_double: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ole.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: c.ole.d $f0, $f13 ; M3-NEXT: bc1t .LBB3_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB3_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_ole_double: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ole.d $f12, $f13 -; CMOV64-NEXT: movt.d $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: c.ole.d $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movt.d $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_ole_double: ; 64R6: # %bb.0: # %entry @@ -340,10 +344,10 @@ define double @tst_select_fcmp_ole_double(double %x, double %y) { ; ; MM32R3-LABEL: tst_select_fcmp_ole_double: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ole.d $f12, $f14 -; MM32R3-NEXT: movt.d $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: c.ole.d $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movt.d $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_ole_double: ; MM32R6: # %bb.0: # %entry @@ -361,28 +365,29 @@ entry: define double @tst_select_fcmp_ogt_double(double %x, double %y) { ; M2-LABEL: tst_select_fcmp_ogt_double: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ule.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: c.ule.d $f0, $f14 ; M2-NEXT: bc1f $BB4_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB4_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_ogt_double: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ule.d $f12, $f14 -; CMOV32R1-NEXT: movf.d $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: c.ule.d $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movf.d $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_ogt_double: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ule.d $f12, $f14 -; CMOV32R2-NEXT: movf.d $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: c.ule.d $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movf.d $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_ogt_double: ; 32R6: # %bb.0: # %entry @@ -394,21 +399,22 @@ define double @tst_select_fcmp_ogt_double(double %x, double %y) { ; ; M3-LABEL: tst_select_fcmp_ogt_double: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ule.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: c.ule.d $f0, $f13 ; M3-NEXT: bc1f .LBB4_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB4_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_ogt_double: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ule.d $f12, $f13 -; CMOV64-NEXT: movf.d $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: c.ule.d $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movf.d $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_ogt_double: ; 64R6: # %bb.0: # %entry @@ -420,10 +426,10 @@ define double @tst_select_fcmp_ogt_double(double %x, double %y) { ; ; MM32R3-LABEL: tst_select_fcmp_ogt_double: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ule.d $f12, $f14 -; MM32R3-NEXT: movf.d $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: c.ule.d $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movf.d $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_ogt_double: ; MM32R6: # %bb.0: # %entry @@ -441,28 +447,29 @@ entry: define double @tst_select_fcmp_oge_double(double %x, double %y) { ; M2-LABEL: tst_select_fcmp_oge_double: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ult.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: c.ult.d $f0, $f14 ; M2-NEXT: bc1f $BB5_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB5_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_oge_double: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ult.d $f12, $f14 -; CMOV32R1-NEXT: movf.d $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: c.ult.d $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movf.d $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_oge_double: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ult.d $f12, $f14 -; CMOV32R2-NEXT: movf.d $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: c.ult.d $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movf.d $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_oge_double: ; 32R6: # %bb.0: # %entry @@ -474,21 +481,22 @@ define double @tst_select_fcmp_oge_double(double %x, double %y) { ; ; M3-LABEL: tst_select_fcmp_oge_double: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ult.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: c.ult.d $f0, $f13 ; M3-NEXT: bc1f .LBB5_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB5_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_oge_double: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ult.d $f12, $f13 -; CMOV64-NEXT: movf.d $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: c.ult.d $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movf.d $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_oge_double: ; 64R6: # %bb.0: # %entry @@ -500,10 +508,10 @@ define double @tst_select_fcmp_oge_double(double %x, double %y) { ; ; MM32R3-LABEL: tst_select_fcmp_oge_double: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ult.d $f12, $f14 -; MM32R3-NEXT: movf.d $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: c.ult.d $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movf.d $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_oge_double: ; MM32R6: # %bb.0: # %entry @@ -521,28 +529,29 @@ entry: define double @tst_select_fcmp_oeq_double(double %x, double %y) { ; M2-LABEL: tst_select_fcmp_oeq_double: ; M2: # %bb.0: # %entry -; M2-NEXT: c.eq.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: c.eq.d $f0, $f14 ; M2-NEXT: bc1t $BB6_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB6_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_oeq_double: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.eq.d $f12, $f14 -; CMOV32R1-NEXT: movt.d $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: c.eq.d $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movt.d $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_oeq_double: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.eq.d $f12, $f14 -; CMOV32R2-NEXT: movt.d $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: c.eq.d $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movt.d $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_oeq_double: ; 32R6: # %bb.0: # %entry @@ -554,21 +563,22 @@ define double @tst_select_fcmp_oeq_double(double %x, double %y) { ; ; M3-LABEL: tst_select_fcmp_oeq_double: ; M3: # %bb.0: # %entry -; M3-NEXT: c.eq.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: c.eq.d $f0, $f13 ; M3-NEXT: bc1t .LBB6_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB6_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_oeq_double: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.eq.d $f12, $f13 -; CMOV64-NEXT: movt.d $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: c.eq.d $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movt.d $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_oeq_double: ; 64R6: # %bb.0: # %entry @@ -580,10 +590,10 @@ define double @tst_select_fcmp_oeq_double(double %x, double %y) { ; ; MM32R3-LABEL: tst_select_fcmp_oeq_double: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.eq.d $f12, $f14 -; MM32R3-NEXT: movt.d $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: c.eq.d $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movt.d $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_oeq_double: ; MM32R6: # %bb.0: # %entry @@ -601,28 +611,29 @@ entry: define double @tst_select_fcmp_one_double(double %x, double %y) { ; M2-LABEL: tst_select_fcmp_one_double: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ueq.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: c.ueq.d $f0, $f14 ; M2-NEXT: bc1f $BB7_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.d $f12, $f14 +; M2-NEXT: mov.d $f0, $f14 ; M2-NEXT: $BB7_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.d $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_one_double: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ueq.d $f12, $f14 -; CMOV32R1-NEXT: movf.d $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.d $f0, $f14 +; CMOV32R1-NEXT: c.ueq.d $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movf.d $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_one_double: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ueq.d $f12, $f14 -; CMOV32R2-NEXT: movf.d $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.d $f0, $f14 +; CMOV32R2-NEXT: c.ueq.d $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movf.d $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_one_double: ; 32R6: # %bb.0: # %entry @@ -635,21 +646,22 @@ define double @tst_select_fcmp_one_double(double %x, double %y) { ; ; M3-LABEL: tst_select_fcmp_one_double: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ueq.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: c.ueq.d $f0, $f13 ; M3-NEXT: bc1f .LBB7_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.d $f12, $f13 +; M3-NEXT: mov.d $f0, $f13 ; M3-NEXT: .LBB7_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.d $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_one_double: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ueq.d $f12, $f13 -; CMOV64-NEXT: movf.d $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.d $f0, $f13 +; CMOV64-NEXT: c.ueq.d $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movf.d $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_one_double: ; 64R6: # %bb.0: # %entry @@ -662,10 +674,10 @@ define double @tst_select_fcmp_one_double(double %x, double %y) { ; ; MM32R3-LABEL: tst_select_fcmp_one_double: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ueq.d $f12, $f14 -; MM32R3-NEXT: movf.d $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.d $f0, $f14 +; MM32R3-NEXT: c.ueq.d $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movf.d $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_one_double: ; MM32R6: # %bb.0: # %entry diff --git a/llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll b/llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll index c0ac43f662f..c04601c64b0 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll @@ -71,19 +71,19 @@ define float @tst_select_i1_float(i1 signext %s, float %x, float %y) { ; M3: # %bb.0: # %entry ; M3-NEXT: andi $1, $4, 1 ; M3-NEXT: bnez $1, .LBB0_2 -; M3-NEXT: nop +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f13, $f14 +; M3-NEXT: mov.s $f0, $f14 ; M3-NEXT: .LBB0_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f13 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_i1_float: ; CMOV64: # %bb.0: # %entry +; CMOV64-NEXT: mov.s $f0, $f14 ; CMOV64-NEXT: andi $1, $4, 1 -; CMOV64-NEXT: movn.s $f14, $f13, $1 ; CMOV64-NEXT: jr $ra -; CMOV64-NEXT: mov.s $f0, $f14 +; CMOV64-NEXT: movn.s $f0, $f13, $1 ; ; 64R6-LABEL: tst_select_i1_float: ; 64R6: # %bb.0: # %entry @@ -116,26 +116,26 @@ define float @tst_select_i1_float_reordered(float %x, float %y, ; M2: # %bb.0: # %entry ; M2-NEXT: andi $1, $6, 1 ; M2-NEXT: bnez $1, $BB1_2 -; M2-NEXT: nop +; M2-NEXT: mov.s $f0, $f12 ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB1_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_i1_float_reordered: ; CMOV32R1: # %bb.0: # %entry +; CMOV32R1-NEXT: mov.s $f0, $f14 ; CMOV32R1-NEXT: andi $1, $6, 1 -; CMOV32R1-NEXT: movn.s $f14, $f12, $1 ; CMOV32R1-NEXT: jr $ra -; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: movn.s $f0, $f12, $1 ; ; CMOV32R2-LABEL: tst_select_i1_float_reordered: ; CMOV32R2: # %bb.0: # %entry +; CMOV32R2-NEXT: mov.s $f0, $f14 ; CMOV32R2-NEXT: andi $1, $6, 1 -; CMOV32R2-NEXT: movn.s $f14, $f12, $1 ; CMOV32R2-NEXT: jr $ra -; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: movn.s $f0, $f12, $1 ; ; 32R6-LABEL: tst_select_i1_float_reordered: ; 32R6: # %bb.0: # %entry @@ -147,19 +147,19 @@ define float @tst_select_i1_float_reordered(float %x, float %y, ; M3: # %bb.0: # %entry ; M3-NEXT: andi $1, $6, 1 ; M3-NEXT: bnez $1, .LBB1_2 -; M3-NEXT: nop +; M3-NEXT: mov.s $f0, $f12 ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB1_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_i1_float_reordered: ; CMOV64: # %bb.0: # %entry +; CMOV64-NEXT: mov.s $f0, $f13 ; CMOV64-NEXT: andi $1, $6, 1 -; CMOV64-NEXT: movn.s $f13, $f12, $1 ; CMOV64-NEXT: jr $ra -; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: movn.s $f0, $f12, $1 ; ; 64R6-LABEL: tst_select_i1_float_reordered: ; 64R6: # %bb.0: # %entry @@ -169,10 +169,10 @@ define float @tst_select_i1_float_reordered(float %x, float %y, ; ; MM32R3-LABEL: tst_select_i1_float_reordered: ; MM32R3: # %bb.0: # %entry +; MM32R3-NEXT: mov.s $f0, $f14 ; MM32R3-NEXT: andi16 $2, $6, 1 -; MM32R3-NEXT: movn.s $f14, $f12, $2 ; MM32R3-NEXT: jr $ra -; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: movn.s $f0, $f12, $2 ; ; MM32R6-LABEL: tst_select_i1_float_reordered: ; MM32R6: # %bb.0: # %entry @@ -188,28 +188,29 @@ entry: define float @tst_select_fcmp_olt_float(float %x, float %y) { ; M2-LABEL: tst_select_fcmp_olt_float: ; M2: # %bb.0: # %entry -; M2-NEXT: c.olt.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: c.olt.s $f0, $f14 ; M2-NEXT: bc1t $BB2_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB2_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_olt_float: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.olt.s $f12, $f14 -; CMOV32R1-NEXT: movt.s $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: c.olt.s $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movt.s $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_olt_float: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.olt.s $f12, $f14 -; CMOV32R2-NEXT: movt.s $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: c.olt.s $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movt.s $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_olt_float: ; 32R6: # %bb.0: # %entry @@ -219,21 +220,22 @@ define float @tst_select_fcmp_olt_float(float %x, float %y) { ; ; M3-LABEL: tst_select_fcmp_olt_float: ; M3: # %bb.0: # %entry -; M3-NEXT: c.olt.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: c.olt.s $f0, $f13 ; M3-NEXT: bc1t .LBB2_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB2_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_olt_float: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.olt.s $f12, $f13 -; CMOV64-NEXT: movt.s $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: c.olt.s $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movt.s $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_olt_float: ; 64R6: # %bb.0: # %entry @@ -243,10 +245,10 @@ define float @tst_select_fcmp_olt_float(float %x, float %y) { ; ; MM32R3-LABEL: tst_select_fcmp_olt_float: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.olt.s $f12, $f14 -; MM32R3-NEXT: movt.s $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: c.olt.s $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movt.s $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_olt_float: ; MM32R6: # %bb.0: # %entry @@ -262,28 +264,29 @@ entry: define float @tst_select_fcmp_ole_float(float %x, float %y) { ; M2-LABEL: tst_select_fcmp_ole_float: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ole.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: c.ole.s $f0, $f14 ; M2-NEXT: bc1t $BB3_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB3_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_ole_float: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ole.s $f12, $f14 -; CMOV32R1-NEXT: movt.s $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: c.ole.s $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movt.s $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_ole_float: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ole.s $f12, $f14 -; CMOV32R2-NEXT: movt.s $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: c.ole.s $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movt.s $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_ole_float: ; 32R6: # %bb.0: # %entry @@ -293,21 +296,22 @@ define float @tst_select_fcmp_ole_float(float %x, float %y) { ; ; M3-LABEL: tst_select_fcmp_ole_float: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ole.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: c.ole.s $f0, $f13 ; M3-NEXT: bc1t .LBB3_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB3_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_ole_float: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ole.s $f12, $f13 -; CMOV64-NEXT: movt.s $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: c.ole.s $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movt.s $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_ole_float: ; 64R6: # %bb.0: # %entry @@ -317,10 +321,10 @@ define float @tst_select_fcmp_ole_float(float %x, float %y) { ; ; MM32R3-LABEL: tst_select_fcmp_ole_float: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ole.s $f12, $f14 -; MM32R3-NEXT: movt.s $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: c.ole.s $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movt.s $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_ole_float: ; MM32R6: # %bb.0: # %entry @@ -336,28 +340,29 @@ entry: define float @tst_select_fcmp_ogt_float(float %x, float %y) { ; M2-LABEL: tst_select_fcmp_ogt_float: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ule.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: c.ule.s $f0, $f14 ; M2-NEXT: bc1f $BB4_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB4_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_ogt_float: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ule.s $f12, $f14 -; CMOV32R1-NEXT: movf.s $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: c.ule.s $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movf.s $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_ogt_float: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ule.s $f12, $f14 -; CMOV32R2-NEXT: movf.s $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: c.ule.s $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movf.s $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_ogt_float: ; 32R6: # %bb.0: # %entry @@ -367,21 +372,22 @@ define float @tst_select_fcmp_ogt_float(float %x, float %y) { ; ; M3-LABEL: tst_select_fcmp_ogt_float: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ule.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: c.ule.s $f0, $f13 ; M3-NEXT: bc1f .LBB4_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB4_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_ogt_float: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ule.s $f12, $f13 -; CMOV64-NEXT: movf.s $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: c.ule.s $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movf.s $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_ogt_float: ; 64R6: # %bb.0: # %entry @@ -391,10 +397,10 @@ define float @tst_select_fcmp_ogt_float(float %x, float %y) { ; ; MM32R3-LABEL: tst_select_fcmp_ogt_float: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ule.s $f12, $f14 -; MM32R3-NEXT: movf.s $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: c.ule.s $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movf.s $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_ogt_float: ; MM32R6: # %bb.0: # %entry @@ -410,28 +416,29 @@ entry: define float @tst_select_fcmp_oge_float(float %x, float %y) { ; M2-LABEL: tst_select_fcmp_oge_float: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ult.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: c.ult.s $f0, $f14 ; M2-NEXT: bc1f $BB5_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB5_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_oge_float: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ult.s $f12, $f14 -; CMOV32R1-NEXT: movf.s $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: c.ult.s $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movf.s $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_oge_float: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ult.s $f12, $f14 -; CMOV32R2-NEXT: movf.s $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: c.ult.s $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movf.s $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_oge_float: ; 32R6: # %bb.0: # %entry @@ -441,21 +448,22 @@ define float @tst_select_fcmp_oge_float(float %x, float %y) { ; ; M3-LABEL: tst_select_fcmp_oge_float: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ult.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: c.ult.s $f0, $f13 ; M3-NEXT: bc1f .LBB5_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB5_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_oge_float: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ult.s $f12, $f13 -; CMOV64-NEXT: movf.s $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: c.ult.s $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movf.s $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_oge_float: ; 64R6: # %bb.0: # %entry @@ -465,10 +473,10 @@ define float @tst_select_fcmp_oge_float(float %x, float %y) { ; ; MM32R3-LABEL: tst_select_fcmp_oge_float: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ult.s $f12, $f14 -; MM32R3-NEXT: movf.s $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: c.ult.s $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movf.s $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_oge_float: ; MM32R6: # %bb.0: # %entry @@ -484,28 +492,29 @@ entry: define float @tst_select_fcmp_oeq_float(float %x, float %y) { ; M2-LABEL: tst_select_fcmp_oeq_float: ; M2: # %bb.0: # %entry -; M2-NEXT: c.eq.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: c.eq.s $f0, $f14 ; M2-NEXT: bc1t $BB6_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB6_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_oeq_float: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.eq.s $f12, $f14 -; CMOV32R1-NEXT: movt.s $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: c.eq.s $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movt.s $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_oeq_float: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.eq.s $f12, $f14 -; CMOV32R2-NEXT: movt.s $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: c.eq.s $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movt.s $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_oeq_float: ; 32R6: # %bb.0: # %entry @@ -515,21 +524,22 @@ define float @tst_select_fcmp_oeq_float(float %x, float %y) { ; ; M3-LABEL: tst_select_fcmp_oeq_float: ; M3: # %bb.0: # %entry -; M3-NEXT: c.eq.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: c.eq.s $f0, $f13 ; M3-NEXT: bc1t .LBB6_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB6_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_oeq_float: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.eq.s $f12, $f13 -; CMOV64-NEXT: movt.s $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: c.eq.s $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movt.s $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_oeq_float: ; 64R6: # %bb.0: # %entry @@ -539,10 +549,10 @@ define float @tst_select_fcmp_oeq_float(float %x, float %y) { ; ; MM32R3-LABEL: tst_select_fcmp_oeq_float: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.eq.s $f12, $f14 -; MM32R3-NEXT: movt.s $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: c.eq.s $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movt.s $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_oeq_float: ; MM32R6: # %bb.0: # %entry @@ -558,28 +568,29 @@ entry: define float @tst_select_fcmp_one_float(float %x, float %y) { ; M2-LABEL: tst_select_fcmp_one_float: ; M2: # %bb.0: # %entry -; M2-NEXT: c.ueq.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: c.ueq.s $f0, $f14 ; M2-NEXT: bc1f $BB7_2 ; M2-NEXT: nop ; M2-NEXT: # %bb.1: # %entry -; M2-NEXT: mov.s $f12, $f14 +; M2-NEXT: mov.s $f0, $f14 ; M2-NEXT: $BB7_2: # %entry ; M2-NEXT: jr $ra -; M2-NEXT: mov.s $f0, $f12 +; M2-NEXT: nop ; ; CMOV32R1-LABEL: tst_select_fcmp_one_float: ; CMOV32R1: # %bb.0: # %entry -; CMOV32R1-NEXT: c.ueq.s $f12, $f14 -; CMOV32R1-NEXT: movf.s $f14, $f12, $fcc0 -; CMOV32R1-NEXT: jr $ra ; CMOV32R1-NEXT: mov.s $f0, $f14 +; CMOV32R1-NEXT: c.ueq.s $f12, $f0 +; CMOV32R1-NEXT: jr $ra +; CMOV32R1-NEXT: movf.s $f0, $f12, $fcc0 ; ; CMOV32R2-LABEL: tst_select_fcmp_one_float: ; CMOV32R2: # %bb.0: # %entry -; CMOV32R2-NEXT: c.ueq.s $f12, $f14 -; CMOV32R2-NEXT: movf.s $f14, $f12, $fcc0 -; CMOV32R2-NEXT: jr $ra ; CMOV32R2-NEXT: mov.s $f0, $f14 +; CMOV32R2-NEXT: c.ueq.s $f12, $f0 +; CMOV32R2-NEXT: jr $ra +; CMOV32R2-NEXT: movf.s $f0, $f12, $fcc0 ; ; 32R6-LABEL: tst_select_fcmp_one_float: ; 32R6: # %bb.0: # %entry @@ -592,21 +603,22 @@ define float @tst_select_fcmp_one_float(float %x, float %y) { ; ; M3-LABEL: tst_select_fcmp_one_float: ; M3: # %bb.0: # %entry -; M3-NEXT: c.ueq.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: c.ueq.s $f0, $f13 ; M3-NEXT: bc1f .LBB7_2 ; M3-NEXT: nop ; M3-NEXT: # %bb.1: # %entry -; M3-NEXT: mov.s $f12, $f13 +; M3-NEXT: mov.s $f0, $f13 ; M3-NEXT: .LBB7_2: # %entry ; M3-NEXT: jr $ra -; M3-NEXT: mov.s $f0, $f12 +; M3-NEXT: nop ; ; CMOV64-LABEL: tst_select_fcmp_one_float: ; CMOV64: # %bb.0: # %entry -; CMOV64-NEXT: c.ueq.s $f12, $f13 -; CMOV64-NEXT: movf.s $f13, $f12, $fcc0 -; CMOV64-NEXT: jr $ra ; CMOV64-NEXT: mov.s $f0, $f13 +; CMOV64-NEXT: c.ueq.s $f12, $f0 +; CMOV64-NEXT: jr $ra +; CMOV64-NEXT: movf.s $f0, $f12, $fcc0 ; ; 64R6-LABEL: tst_select_fcmp_one_float: ; 64R6: # %bb.0: # %entry @@ -619,10 +631,10 @@ define float @tst_select_fcmp_one_float(float %x, float %y) { ; ; MM32R3-LABEL: tst_select_fcmp_one_float: ; MM32R3: # %bb.0: # %entry -; MM32R3-NEXT: c.ueq.s $f12, $f14 -; MM32R3-NEXT: movf.s $f14, $f12, $fcc0 -; MM32R3-NEXT: jr $ra ; MM32R3-NEXT: mov.s $f0, $f14 +; MM32R3-NEXT: c.ueq.s $f12, $f0 +; MM32R3-NEXT: jr $ra +; MM32R3-NEXT: movf.s $f0, $f12, $fcc0 ; ; MM32R6-LABEL: tst_select_fcmp_one_float: ; MM32R6: # %bb.0: # %entry |

