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| author | Sanjay Patel <spatel@rotateright.com> | 2016-10-19 16:58:59 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-10-19 16:58:59 +0000 |
| commit | 3a3aaf67e07ade866b9500a9466086a68d0dd70c (patch) | |
| tree | 15006d3cec17160af880cfd3669c039ad95dd5ea /llvm/test/CodeGen/Mips/llvm-ir/urem.ll | |
| parent | 383803230bba0c0dea3d93d9eb4f97d6fa8f3718 (diff) | |
| download | bcm5719-llvm-3a3aaf67e07ade866b9500a9466086a68d0dd70c.tar.gz bcm5719-llvm-3a3aaf67e07ade866b9500a9466086a68d0dd70c.zip | |
[DAG] optimize negation of bool
Use mask and negate for legalization of i1 source type with SIGN_EXTEND_INREG.
With the mask, this should be no worse than 2 shifts. The mask can be eliminated
in some cases, so that should be better than 2 shifts.
This change exposed some missing folds related to negation:
https://reviews.llvm.org/rL284239
https://reviews.llvm.org/rL284395
There may be others, so please let me know if you see any regressions.
Differential Revision: https://reviews.llvm.org/D25485
llvm-svn: 284611
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir/urem.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/urem.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/urem.ll b/llvm/test/CodeGen/Mips/llvm-ir/urem.ll index bad7c507b05..160c126c7e3 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/urem.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/urem.ll @@ -42,30 +42,30 @@ entry: ; NOT-R6: divu $zero, $[[T1]], $[[T0]] ; NOT-R6: teq $[[T0]], $zero, 7 ; NOT-R6: mfhi $[[T2:[0-9]+]] - ; NOT-R6: sll $[[T3:[0-9]+]], $[[T2]], 31 - ; NOT-R6: sra $2, $[[T3]], 31 + ; NOT-R6: andi $[[T0]], $[[T0]], 1 + ; NOT-R6: negu $2, $[[T0]] ; R6: andi $[[T0:[0-9]+]], $5, 1 ; R6: andi $[[T1:[0-9]+]], $4, 1 ; R6: modu $[[T2:[0-9]+]], $[[T1]], $[[T0]] ; R6: teq $[[T0]], $zero, 7 - ; R6: sll $[[T3:[0-9]+]], $[[T2]], 31 - ; R6: sra $2, $[[T3]], 31 + ; R6: negu $2, $[[T2]] ; MMR3: andi16 $[[T0:[0-9]+]], $5, 1 ; MMR3: andi16 $[[T1:[0-9]+]], $4, 1 ; MMR3: divu $zero, $[[T1]], $[[T0]] ; MMR3: teq $[[T0]], $zero, 7 ; MMR3: mfhi $[[T2:[0-9]+]] - ; MMR3: sll $[[T3:[0-9]+]], $[[T2]], 31 - ; MMR3: sra $2, $[[T3]], 31 + ; MMR3: andi16 $[[T0]], $[[T0]], 1 + ; MMR3: li16 $[[T1:[0-9]+]], 0 + ; MMR3: subu16 $2, $[[T1]], $[[T0]] ; MMR6: andi16 $[[T0:[0-9]+]], $5, 1 ; MMR6: andi16 $[[T1:[0-9]+]], $4, 1 ; MMR6: modu $[[T2:[0-9]+]], $[[T1]], $[[T0]] ; MMR6: teq $[[T0]], $zero, 7 - ; MMR6: sll $[[T3:[0-9]+]], $[[T2]], 31 - ; MMR6: sra $2, $[[T3]], 31 + ; MMR6: li16 $[[T3:[0-9]+]], 0 + ; MMR6: subu16 $2, $[[T3]], $[[T2]] %r = urem i1 %a, %b ret i1 %r |
