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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-09-01 14:53:53 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-09-01 14:53:53 +0000 |
| commit | bd2715475702e6b178e8db2101c8335e305ef787 (patch) | |
| tree | 0b29d29a9d1e49e625bba9112a4d500d093b4ffb /llvm/test/CodeGen/Mips/llvm-ir/sub.ll | |
| parent | fbd3de7851b5874c282c34d9077f470c344e3870 (diff) | |
| download | bcm5719-llvm-bd2715475702e6b178e8db2101c8335e305ef787.tar.gz bcm5719-llvm-bd2715475702e6b178e8db2101c8335e305ef787.zip | |
[mips] interAptiv based generic schedule model
This scheduler describes a processor which covers all MIPS ISAs based
around the interAptiv and P5600 timings.
Reviewers: vkalintiris, dsanders
Differential Revision: https://reviews.llvm.org/D23551
llvm-svn: 280374
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir/sub.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/sub.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/sub.ll b/llvm/test/CodeGen/Mips/llvm-ir/sub.ll index 747a9eb3db3..55b486f83ab 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/sub.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/sub.ll @@ -134,16 +134,16 @@ entry: ; GP32-MM: sltu $[[T1:[0-9]+]], $[[T2:[0-9]+]], $[[T0]] ; GP32-MM: lw $[[T3:[0-9]+]], 16($sp) ; GP32-MM: addu $[[T3]], $[[T1]], $[[T3]] - ; GP32-MM: lw $[[T5:[0-9]+]], 24($sp) - ; GP32-MM: lw $[[T4:[0-9]+]], 28($sp) - ; GP32-MM: subu $[[T1]], $7, $[[T4]] - ; GP32-MM: subu $[[T3]], $4, $[[T3]] - ; GP32-MM: sltu $[[T6:[0-9]+]], $6, $[[T5]] + ; GP32-MM: lw $[[T4:[0-9]+]], 24($sp) + ; GP32-MM: lw $[[T5:[0-9]+]], 28($sp) + ; GP32-MM: subu $[[T1]], $7, $[[T5]] + ; GP32-MM: subu $[[T3]], $[[T6:[0-9]+]], $[[T3]] + ; GP32-MM: sltu $[[T6]], $6, $[[T4]] ; GP32-MM: addu $[[T0]], $[[T6]], $[[T0]] ; GP32-MM: subu $[[T0]], $5, $[[T0]] - ; GP32-MM: sltu $[[T7:[0-9]+]], $7, $[[T4]] - ; GP32-MM: addu $[[T8:[0-8]+]], $[[T7]], $[[T5]] - ; GP32-MM: subu $[[T9:[0-9]+]], $6, $[[T8]] + ; GP32-MM: sltu $[[T6]], $7, $[[T5]] + ; GP32-MM: addu $[[T6]], $[[T6]], $[[T4]] + ; GP32-MM: subu $[[T6]], $6, $[[T6]] ; GP32-MM: move $[[T2]], $[[T1]] ; GP64: dsubu $3, $5, $7 |
