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| author | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-08-04 14:26:35 +0000 |
|---|---|---|
| committer | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-08-04 14:26:35 +0000 |
| commit | 044e172228b89fcdf8843a4135e7f6afbb4fd7b5 (patch) | |
| tree | 06b65a7a3aea202089bfc717054fd6e9ea1b2839 /llvm/test/CodeGen/Mips/llvm-ir/and.ll | |
| parent | 602592a048fda2fb8bcc7c07ed1f1d0a02e8c0d5 (diff) | |
| download | bcm5719-llvm-044e172228b89fcdf8843a4135e7f6afbb4fd7b5.tar.gz bcm5719-llvm-044e172228b89fcdf8843a4135e7f6afbb4fd7b5.zip | |
Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.
It introduced two regressions on 64-bit big-endian targets running under N32
(MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4, and
MultiSource/Applications/kimwitu++/kc) The issue is that on 64-bit targets
comparisons such as BEQ compare the whole GPR64 but incorrectly tell the
instruction selector that they operate on GPR32's. This leads to the
elimination of i32->i64 extensions that are actually required by
comparisons to work correctly.
There's currently a patch under review that fixes this problem.
llvm-svn: 243984
Diffstat (limited to 'llvm/test/CodeGen/Mips/llvm-ir/and.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/llvm-ir/and.ll | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/and.ll b/llvm/test/CodeGen/Mips/llvm-ir/and.ll index 8ebcfe4a3f6..c4121701ec1 100644 --- a/llvm/test/CodeGen/Mips/llvm-ir/and.ll +++ b/llvm/test/CodeGen/Mips/llvm-ir/and.ll @@ -59,7 +59,10 @@ define signext i32 @and_i32(i32 signext %a, i32 signext %b) { entry: ; ALL-LABEL: and_i32: - ; ALL: and $2, $4, $5 + ; GP32: and $2, $4, $5 + + ; GP64: and $[[T0:[0-9]+]], $4, $5 + ; GP64: sll $2, $[[T0]], 0 %r = and i32 %a, %b ret i32 %r |
