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authorJack Carter <jcarter@mips.com>2012-06-28 01:33:40 +0000
committerJack Carter <jcarter@mips.com>2012-06-28 01:33:40 +0000
commit6c0bc0b378790ca38a3d31fc9571c7f25c4a494d (patch)
tree22111e776daa644ed2691aba1bc979af40b308cd /llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
parentfe251c88d9644203e490d52ce71fa8605635ea45 (diff)
downloadbcm5719-llvm-6c0bc0b378790ca38a3d31fc9571c7f25c4a494d.tar.gz
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The Mips specific inline asm operand modifier 'z' has the
following description in the gnu sources: Print $0 if operand is zero otherwise print the op normally. llvm-svn: 159324
Diffstat (limited to 'llvm/test/CodeGen/Mips/inlineasm-operand-code.ll')
-rw-r--r--llvm/test/CodeGen/Mips/inlineasm-operand-code.ll12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll b/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
index 2dcc10def2f..ca4f3e4c5ae 100644
--- a/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
+++ b/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
@@ -29,5 +29,17 @@ entry:
;CHECK: #NO_APP
tail call i32 asm sideeffect "addi $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) nounwind
+; z with -3
+;CHECK: #APP
+;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-3
+;CHECK: #NO_APP
+ tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 -3) nounwind
+
+; z with 0
+;CHECK: #APP
+;CHECK: addi ${{[0-9]+}},${{[0-9]+}},$0
+;CHECK: #NO_APP
+ tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
+
ret i32 0
}
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