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authorSimon Dardis <simon.dardis@mips.com>2018-06-01 10:07:10 +0000
committerSimon Dardis <simon.dardis@mips.com>2018-06-01 10:07:10 +0000
commitee67dcb837b37a1e1b538dec78ca9fd7c9f2315a (patch)
tree32cba417132395954cdd6b6f7f71065a24707923 /llvm/test/CodeGen/Mips/frameindex.ll
parent82ebdd792927f8658ed90e4e04245af5566c8138 (diff)
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[mips] Select the correct instruction for computing frameindexes
Reviewers: smaksimovic, atanasyan, abeserminji Differential Revision: https://reviews.llvm.org/D47582 llvm-svn: 333736
Diffstat (limited to 'llvm/test/CodeGen/Mips/frameindex.ll')
-rw-r--r--llvm/test/CodeGen/Mips/frameindex.ll20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/frameindex.ll b/llvm/test/CodeGen/Mips/frameindex.ll
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+++ b/llvm/test/CodeGen/Mips/frameindex.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=mips-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS32
+; RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MM
+; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS64
+
+; REQUIRES: asserts
+
+; CHECK-LABEL: Instruction selection ends:
+
+; MIPS32: t{{[0-9]+}}: i{{[0-9]+}} = LEA_ADDiu TargetFrameIndex:i32<0>, TargetConstant:i32<0>
+; MM: t{{[0-9]+}}: i{{[0-9]+}} = LEA_ADDiu_MM TargetFrameIndex:i32<0>, TargetConstant:i32<0>
+; MIPS64: t{{[0-9]+}}: i{{[0-9]+}} = LEA_ADDiu64 TargetFrameIndex:i64<0>, TargetConstant:i64<0>
+
+define i32 @k() {
+entry:
+ %h = alloca i32, align 4
+ %call = call i32 @g(i32* %h)
+ ret i32 %call
+}
+
+declare i32 @g(i32*)
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