summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Mips/fneg.ll
diff options
context:
space:
mode:
authorDaniel Sanders <daniel.sanders@imgtec.com>2014-04-09 09:56:43 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2014-04-09 09:56:43 +0000
commitb282f1fec5ec87bdf8c3265061c77dd4c6fac78c (patch)
treed75648df4f54f698b5ada1b8421697ae034f56d0 /llvm/test/CodeGen/Mips/fneg.ll
parentb175d57edc028888f958ee3cca7072f16db25fa5 (diff)
downloadbcm5719-llvm-b282f1fec5ec87bdf8c3265061c77dd4c6fac78c.tar.gz
bcm5719-llvm-b282f1fec5ec87bdf8c3265061c77dd4c6fac78c.zip
Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math
Summary: They behave in accordance with the Has2008 and ABS2008 configuration bits of the processor which are used to select between the 1985 and 2008 versions of IEEE 754. In 1985 mode, these instructions are arithmetic (i.e. they raise invalid operation exceptions when given NaN), in 2008 mode they are non-arithmetic (i.e. they are copies). nmadd.[ds], and nmsub.[ds] are still subject to -enable-no-nans-fp-math because the ISA spec does not explicitly state that they obey Has2008 and ABS2008. Fixed the issue with the previous version of this patch (r205628). A pre-existing 'let Predicate =' statement was removing some predicates that were necessary for FP64 to behave correctly. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3274 llvm-svn: 205844
Diffstat (limited to 'llvm/test/CodeGen/Mips/fneg.ll')
-rw-r--r--llvm/test/CodeGen/Mips/fneg.ll27
1 files changed, 20 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/Mips/fneg.ll b/llvm/test/CodeGen/Mips/fneg.ll
index b322abdaa23..4fb80fdb4f3 100644
--- a/llvm/test/CodeGen/Mips/fneg.ll
+++ b/llvm/test/CodeGen/Mips/fneg.ll
@@ -1,17 +1,30 @@
-; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s
+; Check that abs.[ds] is selected and does not depend on -enable-no-nans-fp-math
+; They obey the Has2008 and ABS2008 configuration bits which govern the
+; conformance to IEEE 754 (1985) and IEEE 754 (2008). When these bits are not
+; present, they confirm to 1985.
+; In 1985 mode, abs.[ds] are arithmetic (i.e. they raise invalid operation
+; exceptions when given NaN's). In 2008 mode, they are non-arithmetic (i.e.
+; they are copies and don't raise any exceptions).
-define float @foo0(i32 %a, float %d) nounwind readnone {
+; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s
+; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32r2 | FileCheck %s
+; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s
+
+; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 | FileCheck %s
+; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 -enable-no-nans-fp-math | FileCheck %s
+
+define float @foo0(float %d) nounwind readnone {
entry:
-; CHECK-NOT: neg.s
+; CHECK-LABEL: foo0:
+; CHECK: neg.s
%sub = fsub float -0.000000e+00, %d
ret float %sub
}
-define double @foo1(i32 %a, double %d) nounwind readnone {
+define double @foo1(double %d) nounwind readnone {
entry:
-; CHECK: foo1
-; CHECK-NOT: neg.d
-; CHECK: jr
+; CHECK-LABEL: foo1:
+; CHECK: neg.d
%sub = fsub double -0.000000e+00, %d
ret double %sub
}
OpenPOWER on IntegriCloud