[mips] N64 static relocation model support

This patch makes one change to GOT handling and two changes to N64's
relocation model handling. Furthermore, the jumptable encodings have
been corrected for static N64.

Big GOT handling is now done via a new SDNode MipsGotHi - this node is
unconditionally lowered to an lui instruction.

The first change to N64's relocation handling is the lifting of the
restriction that N64 always uses PIC. Now it is possible to target static
environments.

The second change adds support for 64 bit symbols and enables them by
default. Previously N64 had patterns for sym32 mode only. In this mode all
symbols are assumed to have 32 bit addresses. sym32 mode support
is selectable with attribute 'sym32'. A follow on patch for clang will
add the necessary frontend parameter.

This partially resolves PR/23485.

Thanks to Brooks Davis for reporting the issue!

Reviewers: dsanders, seanbruno, zoran.jovanovic, vkalintiris

Differential Revision: https://reviews.llvm.org/D23652

llvm-svn: 293164

17 files changed, 77 insertions, 74 deletions

diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-float.ll b/llvm/test/CodeGen/Mips/cconv/arguments-float.ll
index a76cf6226dc..7d32992ecb1 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-float.ll
@@ -49,7 +49,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(doubles)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
 
 ; The first four arguments are the same in O32/N32/N64.
 ; The first argument is floating point but soft-float is enabled so floating
@@ -132,7 +132,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(floats)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
 
 ; The first four arguments are the same in O32/N32/N64.
 ; The first argument is floating point but soft-float is enabled so floating
@@ -180,10 +180,10 @@ entry:
 ; ALL-LABEL: double_arg2:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
-; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG:           ld [[R1:\$[0-9]]], %got_disp(bytes)(
-; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(doubles)(
+; SYM32-DAG:           addiu  [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG:           daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
+; SYM32-DAG:           addiu  [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
 
 ; The first four arguments are the same in O32/N32/N64.
 ; The first argument isn't floating point so floating point registers are not
@@ -207,10 +207,11 @@ entry:
 ; ALL-LABEL: float_arg2:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
-; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG:           ld [[R1:\$[0-9]]], %got_disp(bytes)(
-; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(floats)(
+; SYM32-DAG:         addiu  [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG:         daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
+; SYM32-DAG:         addiu  [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG:         daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
+
 
 ; The first four arguments are the same in O32/N32/N64.
 ; The first argument isn't floating point so floating point registers are not
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll b/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll
index 70df97608aa..086ba9bce27 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll
@@ -30,7 +30,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(ldoubles)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(ldoubles)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(ldoubles)
 
 ; The first four arguments are the same in N32/N64.
 ; The first argument is floating point but soft-float is enabled so floating
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
index 5f7a86534bd..c59ec02fa2d 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
@@ -42,7 +42,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:         addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG:         ld [[R2:\$[0-9]]], %got_disp(doubles)(
+; SYM64-DAG:         daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
 
 ; O32 forbids using floating point registers for the non-variable portion.
 ; N32/N64 allow it.
@@ -107,7 +107,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:         addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG:         ld [[R2:\$[0-9]]], %got_disp(floats)(
+; SYM64-DAG:         daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
 
 ; The first four arguments are the same in O32/N32/N64.
 ; The non-variable portion should be unaffected.
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
index 2e753d0f07c..24bb95c7c68 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
@@ -49,7 +49,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(doubles)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
 
 ; The first argument is floating point so floating point registers are used.
 ; The first argument is the same for O32/N32/N64 but the second argument differs
@@ -111,8 +111,8 @@ entry:
 ; ALL-LABEL: float_args:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
-; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG:           ld [[R1:\$[0-9]]], %got_disp(floats)(
+; SYM32-DAG:           addiu  [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG:           daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
 
 ; The first argument is floating point so floating point registers are used.
 ; The first argument is the same for O32/N32/N64 but the second argument differs
@@ -164,9 +164,9 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG:           ld [[R1:\$[0-9]]], %got_disp(bytes)(
+; SYM64-DAG:           daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(doubles)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
 
 ; The first argument is the same in O32/N32/N64.
 ; ALL-DAG:           sb $4, 1([[R1]])
@@ -195,9 +195,9 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG:           ld [[R1:\$[0-9]]], %got_disp(bytes)(
+; SYM64-DAG:           daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(floats)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
 
 ; The first argument is the same in O32/N32/N64.
 ; ALL-DAG:           sb $4, 1([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll b/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll
index 1a3b664d915..6c601e96ed8 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll
@@ -30,7 +30,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(ldoubles)
-; SYM64-DAG:           ld [[R2:\$[0-9]]], %got_disp(ldoubles)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(ldoubles)
 
 ; The first four arguments are the same in N32/N64.
 ; ALL-DAG:           sdc1 $f12, 16([[R2]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll b/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
index 44ea7c0f833..6288b5d52fd 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
@@ -28,7 +28,7 @@ entry:
 ; SYM32-DAG:   lui   [[PTR_HI:\$[0-9]+]], %hi(bytes)
 ; SYM32-DAG:   addiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(bytes)
 
-; SYM64-DAG:   ld    [[PTR:\$[0-9]+]], %got_disp(bytes)(
+; SYM64-DAG:   addiu [[PTR:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
 
 ; O32-BE-DAG:  srl [[ARG:\$[0-9]+]], $4, 24
 ; O32-BE-DAG:  sb  [[ARG]], 1([[PTR]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
index ba3aeb598f5..b41b5b7597c 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
@@ -259,7 +259,9 @@ entry:
   call void (i8*, ...) @varArgF_SmallStruct(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i32 0, i32 0), i64 inreg %3)
   ret void
  ; CHECK-LABEL: smallStruct_8b:
+ ; Check that the structure is not shifted before the pointer to str is loaded.
  ; CHECK-NOT: dsll
+ ; CHECK: lui
 }
 
 define void @smallStruct_9b(%struct.SmallStruct_9b* %ss) #0 {
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
index 74d3d859ed7..8a20f5e43f1 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
@@ -96,6 +96,7 @@ entry:
   ret void
  ; CHECK-LABEL: smallStruct_1b1i:
  ; CHECK-NOT: dsll
+ ; CHECK: lui
 }
 
 define void @smallStruct_1b1s1b(%struct.SmallStruct_1b1s1b* %ss) #0 {
@@ -129,6 +130,7 @@ entry:
   ret void
  ; CHECK-LABEL: smallStruct_1s1i:
  ; CHECK-NOT: dsll
+ ; CHECK: lui
 }
 
 define void @smallStruct_3b1s(%struct.SmallStruct_3b1s* %ss) #0 {
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll b/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
index 9c20b882dcb..785188b3c51 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
@@ -85,7 +85,7 @@ entry:
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
 
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(hwords)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
 
 ; ALL-DAG:       sh [[ARG1]], 2([[GV]])
 
@@ -203,7 +203,7 @@ entry:
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
 
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(words)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
 
 ; ALL-DAG:       sw [[ARG1]], 4([[GV]])
 
@@ -324,7 +324,7 @@ entry:
 ; O32-DAG:       sw [[ARG1]], 12([[GV]])
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(dwords)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
 ; NEW-DAG:       ld [[ARG1:\$[0-9]+]], 0([[VA]])
 ; NEW-DAG:       sd [[ARG1]], 8([[GV]])
 
@@ -448,7 +448,7 @@ entry:
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
 
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(hwords)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
 
 ; ALL-DAG:       sh [[ARG1]], 2([[GV]])
 
@@ -566,7 +566,7 @@ entry:
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
 
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(words)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
 
 ; ALL-DAG:       sw [[ARG1]], 4([[GV]])
 
@@ -687,7 +687,7 @@ entry:
 ; O32-DAG:       sw [[ARG1]], 12([[GV]])
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(dwords)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
 ; NEW-DAG:       ld [[ARG1:\$[0-9]+]], 0([[VA]])
 ; NEW-DAG:       sd [[ARG1]], 8([[GV]])
 
@@ -810,7 +810,7 @@ entry:
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
 
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(hwords)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
 
 ; ALL-DAG:       sh [[ARG1]], 2([[GV]])
 
@@ -927,7 +927,7 @@ entry:
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
 
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(words)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
 
 ; ALL-DAG:       sw [[ARG1]], 4([[GV]])
 
@@ -1047,7 +1047,7 @@ entry:
 ; O32-DAG:       sw [[ARG1]], 12([[GV]])
 
 ; N32-DAG:       addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; N64-DAG:       ld [[GV:\$[0-9]+]], %got_disp(dwords)(
+; N64-DAG:       daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
 ; NEW-DAG:       ld [[ARG1:\$[0-9]+]], 0([[VA]])
 ; NEW-DAG:       sd [[ARG1]], 8([[GV]])
 
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments.ll b/llvm/test/CodeGen/Mips/cconv/arguments.ll
index 7af4e5517d5..2466d59045b 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments.ll
@@ -55,7 +55,7 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG:           ld [[R1:\$[0-9]+]], %got_disp(bytes)(
+; SYM64-DAG:           daddiu [[R1:\$[0-9]+]], ${{[0-9]+}},  %lo(bytes)
 
 ; The first four arguments are the same in O32/N32/N64
 ; ALL-DAG:           sb $4, 1([[R1]])
@@ -120,9 +120,9 @@ entry:
 ; We won't test the way the global address is calculated in this test. This is
 ; just to get the register number for the other checks.
 ; SYM32-DAG:           addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG:           ld [[R1:\$[0-9]+]], %got_disp(bytes)(
+; SYM64-DAG:           daddiu [[R1:\$[0-9]+]], ${{[0-9]+}},  %lo(bytes)
 ; SYM32-DAG:           addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; SYM64-DAG:           ld [[R2:\$[0-9]+]], %got_disp(dwords)(
+; SYM64-DAG:           daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
 
 ; The first argument is the same in O32/N32/N64.
 ; ALL-DAG:           sb $4, 1([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/return-float.ll b/llvm/test/CodeGen/Mips/cconv/return-float.ll
index b9a6d6c5bc0..dd457fc18cd 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-float.ll
@@ -30,8 +30,7 @@ entry:
 ; O32-DAG:           lw $2, %lo(float)([[R1]])
 ; N32-DAG:           lui [[R1:\$[0-9]+]], %hi(float)
 ; N32-DAG:           lw $2, %lo(float)([[R1]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(float)(
-; N64-DAG:           lw $2, 0([[R1]])
+; N64-DAG:           lw $2, %lo(float)([[R1:\$[0-9+]]])
 
 define double @retdouble() nounwind {
 entry:
@@ -44,5 +43,4 @@ entry:
 ; O32-DAG:           addiu [[R2:\$[0-9]+]], [[R1]], %lo(double)
 ; O32-DAG:           lw $3, 4([[R2]])
 ; N32-DAG:           ld $2, %lo(double)([[R1:\$[0-9]+]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(double)(
-; N64-DAG:           ld $2, 0([[R1]])
+; N64-DAG:           ld $2, %lo(double)([[R1:\$[0-9]+]])
diff --git a/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll b/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
index 768cb6a9f2c..44ef65ee258 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
@@ -33,8 +33,7 @@ entry:
 ; O32-DAG:           lwc1 $f0, %lo(float)([[R1]])
 ; N32-DAG:           lui [[R1:\$[0-9]+]], %hi(float)
 ; N32-DAG:           lwc1 $f0, %lo(float)([[R1]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(float)(
-; N64-DAG:           lwc1 $f0, 0([[R1]])
+; N64-DAG:           lwc1 $f0, %lo(float)([[R1:\$[0-9+]]])
 
 define double @retdouble() nounwind {
 entry:
@@ -45,8 +44,7 @@ entry:
 ; ALL-LABEL: retdouble:
 ; O32-DAG:           ldc1 $f0, %lo(double)([[R1:\$[0-9]+]])
 ; N32-DAG:           ldc1 $f0, %lo(double)([[R1:\$[0-9]+]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(double)(
-; N64-DAG:           ldc1 $f0, 0([[R1]])
+; N64-DAG:           ldc1 $f0, %lo(double)([[R1:\$[0-9]+]])
 
 define { double, double } @retComplexDouble() #0 {
   %retval = alloca { double, double }, align 8
diff --git a/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll b/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
index bdbfb80bd4a..e527866eb97 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
@@ -24,8 +24,8 @@ entry:
 ; N32-DAG:           dmtc1 [[R2]], $f0
 ; N32-DAG:           dmtc1 [[R4]], $f2
 
-; N64-DAG:           ld [[R2:\$[0-9]+]], %got_disp(fp128)([[R1:\$[0-9]+]])
-; N64-DAG:           ld [[R3:\$[0-9]+]], 0([[R2]])
+; N64-DAG:           lui [[R2:\$[0-9]+]], %highest(fp128)
+; N64-DAG:           ld [[R3:\$[0-9]+]], %lo(fp128)([[R2]])
 ; N64-DAG:           ld [[R4:\$[0-9]+]], 8([[R2]])
 ; N64-DAG:           dmtc1 [[R3]], $f0
 ; N64-DAG:           dmtc1 [[R4]], $f2
diff --git a/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll b/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
index 9b178e4380d..492db768950 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
@@ -29,8 +29,8 @@ entry:
 ; N32-DAG:        ld  [[R4:\$[0-9]+]], 8([[R3]])
 ; N32-DAG:        dmtc1 [[R4]], $f1
 
-; N64-DAG:        ld  [[R1:\$[0-9]+]], %got_disp(struct_fp128)($1)
-; N64-DAG:        ld  [[R2:\$[0-9]+]], 0([[R1]])
+; N64-DAG:        lui  [[R1:\$[0-9]+]], %highest(struct_fp128)
+; N64-DAG:        ld  [[R2:\$[0-9]+]], %lo(struct_fp128)([[R1]])
 ; N64-DAG:        dmtc1 [[R2]], $f0
 ; N64-DAG:        ld  [[R4:\$[0-9]+]], 8([[R1]])
 ; N64-DAG:        dmtc1 [[R4]], $f1
diff --git a/llvm/test/CodeGen/Mips/cconv/return-struct.ll b/llvm/test/CodeGen/Mips/cconv/return-struct.ll
index da20919ffd4..0997cfbd98a 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-struct.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-struct.ll
@@ -37,12 +37,10 @@ entry:
 ; N32-BE-DAG:        lb [[R2:\$[0-9]+]], %lo(struct_byte)([[R1]])
 ; N32-BE-DAG:        dsll $2, [[R2]], 56
 
-; N64-LE-DAG:        ld  [[R1:\$[0-9]+]], %got_disp(struct_byte)($1)
-; N64-LE-DAG:        lb $2, 0([[R1]])
+; N64-LE-DAG:        lb $2, %lo(struct_byte)(${{[0-9]+}})
 
-; N64-BE-DAG:        ld  [[R1:\$[0-9]+]], %got_disp(struct_byte)($1)
-; N64-BE-DAG:        lb [[R2:\$[0-9]+]], 0([[R1]])
-; N64-BE-DAG:        dsll $2, [[R2]], 56
+; N64-BE-DAG:        lb [[R1:\$[0-9]+]], %lo(struct_byte)(${{[0-9]+}})
+; N64-BE-DAG:        dsll $2, [[R1]], 56
 
 ; This test is based on the way clang currently lowers {i8,i8} to {i16}.
 ; FIXME: It should probably work for without any lowering too but this doesn't
@@ -75,13 +73,15 @@ entry:
 ; N32-BE-DAG:        lh  [[R3:\$[0-9]+]], 8([[SP:\$sp]])
 ; N32-BE-DAG:        dsll $2, [[R3]], 48
 
-; N64-LE-DAG:        ld  [[R1:\$[0-9]+]], %got_disp(struct_2byte)($1)
-; N64-LE-DAG:        lhu [[R2:\$[0-9]+]], 0([[R1]])
+; N64-LE-DAG:        daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %hi(struct_2byte)
+; N64-LE-DAG:        dsll [[R1:\$[0-9]]], $[[R0]], 16
+; N64-LE-DAG:        lhu [[R2:\$[0-9]+]], %lo(struct_2byte)([[R1]])
 ; N64-LE-DAG:        sh  [[R2]], 8([[SP:\$sp]])
 ; N64-LE-DAG:        lh  $2, 8([[SP:\$sp]])
 
-; N64-BE-DAG:        ld  [[R1:\$[0-9]+]], %got_disp(struct_2byte)($1)
-; N64-BE-DAG:        lhu [[R2:\$[0-9]+]], 0([[R1]])
+; N64-BE-DAG:        daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %hi(struct_2byte)
+; N64-BE-DAG:        dsll $[[R1:[0-9]]], $[[R0]], 16
+; N64-BE-DAG:        lhu [[R2:\$[0-9]+]], %lo(struct_2byte)($[[R1]])
 ; N64-BE-DAG:        sh  [[R2]], 8([[SP:\$sp]])
 ; N64-BE-DAG:        lh  [[R3:\$[0-9]+]], 8([[SP:\$sp]])
 ; N64-BE-DAG:        dsll $2, [[R3]], 48
@@ -126,14 +126,14 @@ entry:
 ; N32-BE-DAG:        or [[R4:\$[0-9]+]], [[R3]], [[R2]]
 ; N32-BE-DAG:        dsll $2, [[R4]], 16
 
-; N64-LE-DAG:        ld  [[PTR:\$[0-9]+]], %got_disp(struct_3xi16)($1)
+; N64-LE-DAG:        daddiu [[PTR:\$[0-9]+]], [[R0:\$[0-9]+]], %lo(struct_3xi16)
 ; N64-LE-DAG:        lh [[R1:\$[0-9]+]], 4([[PTR]])
-; N64-LE-DAG:        lwu [[R2:\$[0-9]+]], 0([[PTR]])
+; N64-LE-DAG:        lwu [[R2:\$[0-9]+]], %lo(struct_3xi16)([[R0]])
 ; N64-LE-DAG:        dsll [[R3:\$[0-9]+]], [[R1]], 32
 ; N64-LE-DAG:        or $2, [[R2]], [[R3]]
 
-; N64-BE-DAG:        ld  [[PTR:\$[0-9]+]], %got_disp(struct_3xi16)($1)
-; N64-BE-DAG:        lw [[R1:\$[0-9]+]], 0([[PTR]])
+; N64-BE-DAG:        daddiu [[PTR:\$[0-9]+]], [[R0:\$[0-9]+]], %lo(struct_3xi16)
+; N64-BE-DAG:        lw [[R1:\$[0-9]+]], %lo(struct_3xi16)([[R0]])
 ; N64-BE-DAG:        dsll [[R2:\$[0-9]+]], [[R1]], 16
 ; N64-BE-DAG:        lhu [[R3:\$[0-9]+]], 4([[PTR]])
 ; N64-BE-DAG:        or [[R4:\$[0-9]+]], [[R3]], [[R2]]
@@ -161,9 +161,8 @@ entry:
 ; N32:            jal memcpy
 
 ; sret pointer is already in $4
-; N64-DAG:        ld $5, %got_disp(struct_128xi16)(
-; N64-DAG:        ld $25, %call16(memcpy)(
-; N64:            jalr $25
+; N64-DAG:        lui ${{[0-9]}}, %highest(struct_128xi16)
+; N64:            jal memcpy
 
 ; Ensure that large structures (>128-bit) are returned indirectly.
 ; This will generate inlined memcpy's anyway so pick the smallest large
@@ -214,13 +213,14 @@ entry:
 ; N32-DAG:        sw [[T5]], 20([[RET_PTR]])
 
 ; sret pointer is already in $4
-; N64-DAG:        ld [[PTR:\$[0-9]+]], %got_disp(struct_6xi32)(
-; N64-DAG:        lw [[T0:\$[0-9]+]], 0([[PTR]])
+; N64-DAG:        lui [[PTR_HI:\$[0-9]+]], %highest(struct_6xi32)
+; N64-DAG:        daddiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(struct_6xi32)
 ; N64-DAG:        lw [[T1:\$[0-9]+]], 4([[PTR]])
 ; N64-DAG:        lw [[T2:\$[0-9]+]], 8([[PTR]])
 ; N64-DAG:        lw [[T3:\$[0-9]+]], 12([[PTR]])
 ; N64-DAG:        lw [[T4:\$[0-9]+]], 16([[PTR]])
 ; N64-DAG:        lw [[T5:\$[0-9]+]], 20([[PTR]])
+; N64-DAG:        lw [[T0:\$[0-9]+]], %lo(struct_6xi32)([[PTR_HI]])
 ; N64-DAG:        sw [[T0]], 0($4)
 ; N64-DAG:        sw [[T1]], 4($4)
 ; N64-DAG:        sw [[T2]], 8($4)
diff --git a/llvm/test/CodeGen/Mips/cconv/return.ll b/llvm/test/CodeGen/Mips/cconv/return.ll
index 561c94cb578..c2bbe77e54b 100644
--- a/llvm/test/CodeGen/Mips/cconv/return.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return.ll
@@ -33,8 +33,8 @@ entry:
 ; O32-DAG:           lbu $2, %lo(byte)([[R1]])
 ; N32-DAG:           lui [[R1:\$[0-9]+]], %hi(byte)
 ; N32-DAG:           lbu $2, %lo(byte)([[R1]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(byte)(
-; N64-DAG:           lbu $2, 0([[R1]])
+; N64-DAG:           lui  [[R1:\$[0-9]+]], %highest(byte)
+; N64-DAG:           lbu $2, %lo(byte)([[R1]])
 
 define i32 @reti32() nounwind {
 entry:
@@ -47,8 +47,8 @@ entry:
 ; O32-DAG:           lw $2, %lo(word)([[R1]])
 ; N32-DAG:           lui [[R1:\$[0-9]+]], %hi(word)
 ; N32-DAG:           lw $2, %lo(word)([[R1]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(word)(
-; N64-DAG:           lw $2, 0([[R1]])
+; N64-DAG:           lui [[R1:\$[0-9]+]], %highest(word)
+; N64-DAG:           lw $2, %lo(word)([[R1]])
 
 define i64 @reti64() nounwind {
 entry:
@@ -62,5 +62,5 @@ entry:
 ; O32-DAG:           addiu [[R2:\$[0-9]+]], [[R1]], %lo(dword)
 ; O32-DAG:           lw $3, 4([[R2]])
 ; N32-DAG:           ld $2, %lo(dword)([[R1:\$[0-9]+]])
-; N64-DAG:           ld  [[R1:\$[0-9]+]], %got_disp(dword)([[R1:\$[0-9]+]])
-; N64-DAG:           ld $2, 0([[R1]])
+; N64-DAG:           lui  [[R1:\$[0-9]+]], %highest(dword)
+; N64-DAG:           ld $2, %lo(dword)([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/roundl-call.ll b/llvm/test/CodeGen/Mips/cconv/roundl-call.ll
index 8e4d6597784..0861197290a 100644
--- a/llvm/test/CodeGen/Mips/cconv/roundl-call.ll
+++ b/llvm/test/CodeGen/Mips/cconv/roundl-call.ll
@@ -5,8 +5,8 @@
 
 ; RUN: llc -march=mips64 -mcpu=mips64 -target-abi=n64 -relocation-model=pic < \
 ; RUN:     %s | FileCheck %s -check-prefixes=ALL,N64,HARD-FLOAT
-; RUN: llc -march=mips64el -mcpu=mips64 -target-abi=n64 -relocation-model=pic < \
-; RUN:     %s | FileCheck %s -check-prefixes=ALL,N64,HARD-FLOAT
+; RUN: llc -march=mips64el -mcpu=mips64 -target-abi=n64 -relocation-model=pic \
+; RUN:     < %s | FileCheck %s -check-prefixes=ALL,N64,HARD-FLOAT
 
 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=+soft-float -target-abi=n32 \
 ; RUN:     -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,N32,SOFT-FLOAT
@@ -14,9 +14,11 @@
 ; RUN:     -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,N32,SOFT-FLOAT
 
 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=+soft-float -target-abi=n64 < %s \
-; RUN: | FileCheck %s -check-prefixes=ALL,N64,SOFT-FLOAT
+; RUN:     -relocation-model=pic | FileCheck %s \
+; RUN:     -check-prefixes=ALL,N64,SOFT-FLOAT
 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=+soft-float -target-abi=n64 < \
-; RUN:     %s | FileCheck %s -check-prefixes=ALL,N64,SOFT-FLOAT
+; RUN:     %s -relocation-model=pic | FileCheck %s \
+; RUN:     -check-prefixes=ALL,N64,SOFT-FLOAT
 
 @fp128 = global fp128 zeroinitializer