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| author | Toma Tabacu <toma.tabacu@imgtec.com> | 2014-08-14 13:10:48 +0000 |
|---|---|---|
| committer | Toma Tabacu <toma.tabacu@imgtec.com> | 2014-08-14 13:10:48 +0000 |
| commit | 726f1ea2c50bfaf98f95580fb822564060e22271 (patch) | |
| tree | 2a63ae74a40cc8a7839757e73d9f1a703c08dea4 /llvm/test/CodeGen/Mips/cconv/arguments-float.ll | |
| parent | c6221a58ec0a5fb2cad1d06fa0ab4692c31c809c (diff) | |
| download | bcm5719-llvm-726f1ea2c50bfaf98f95580fb822564060e22271.tar.gz bcm5719-llvm-726f1ea2c50bfaf98f95580fb822564060e22271.zip | |
[mips] Improve robustness of some tests.
Summary:
This is done by removing some hardcoded registers like $at or expecting a single digit register to be selected.
Contains work done by Matheus Almeida.
Reviewers: matheusalmeida, dsanders
Reviewed By: dsanders
Subscribers: tomatabacu
Differential Revision: http://reviews.llvm.org/D4227
llvm-svn: 215640
Diffstat (limited to 'llvm/test/CodeGen/Mips/cconv/arguments-float.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/cconv/arguments-float.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-float.ll b/llvm/test/CodeGen/Mips/cconv/arguments-float.ll index e2119ec0802..0543c61d4d0 100644 --- a/llvm/test/CodeGen/Mips/cconv/arguments-float.ll +++ b/llvm/test/CodeGen/Mips/cconv/arguments-float.ll @@ -69,26 +69,26 @@ entry: ; O32-DAG: sw [[R4]], 28([[R2]]) ; NEW-DAG: sd $6, 24([[R2]]) -; O32-DAG: lw [[R3:\$[0-9]+]], 32($sp) -; O32-DAG: lw [[R4:\$[0-9]+]], 36($sp) +; O32-DAG: lw [[R3:\$([0-9]+|gp)]], 32($sp) +; O32-DAG: lw [[R4:\$([0-9]+|gp)]], 36($sp) ; O32-DAG: sw [[R3]], 32([[R2]]) ; O32-DAG: sw [[R4]], 36([[R2]]) ; NEW-DAG: sd $7, 32([[R2]]) -; O32-DAG: lw [[R3:\$[0-9]+]], 40($sp) -; O32-DAG: lw [[R4:\$[0-9]+]], 44($sp) +; O32-DAG: lw [[R3:\$([0-9]+|gp)]], 40($sp) +; O32-DAG: lw [[R4:\$([0-9]+|gp)]], 44($sp) ; O32-DAG: sw [[R3]], 40([[R2]]) ; O32-DAG: sw [[R4]], 44([[R2]]) ; NEW-DAG: sd $8, 40([[R2]]) -; O32-DAG: lw [[R3:\$[0-9]+]], 48($sp) -; O32-DAG: lw [[R4:\$[0-9]+]], 52($sp) +; O32-DAG: lw [[R3:\$([0-9]+|gp)]], 48($sp) +; O32-DAG: lw [[R4:\$([0-9]+|gp)]], 52($sp) ; O32-DAG: sw [[R3]], 48([[R2]]) ; O32-DAG: sw [[R4]], 52([[R2]]) ; NEW-DAG: sd $9, 48([[R2]]) -; O32-DAG: lw [[R3:\$[0-9]+]], 56($sp) -; O32-DAG: lw [[R4:\$[0-9]+]], 60($sp) +; O32-DAG: lw [[R3:\$([0-9]+|gp)]], 56($sp) +; O32-DAG: lw [[R4:\$([0-9]+|gp)]], 60($sp) ; O32-DAG: sw [[R3]], 56([[R2]]) ; O32-DAG: sw [[R4]], 60([[R2]]) ; NEW-DAG: sd $10, 56([[R2]]) |
