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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
| commit | 22bec282e995ff17b115cb1e94d8042d3b2b920d (patch) | |
| tree | dd37e8b8e05f3fe208e215b8061885d21c431520 /llvm/test/CodeGen/Mips/and1.ll | |
| parent | e2e091bd596cd3b079815dbb82a6919c04f55aa5 (diff) | |
| download | bcm5719-llvm-22bec282e995ff17b115cb1e94d8042d3b2b920d.tar.gz bcm5719-llvm-22bec282e995ff17b115cb1e94d8042d3b2b920d.zip | |
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
Change these to patterns.
2. Add another 16 instructions.
Patch by Reed Kotler.
llvm-svn: 161272
Diffstat (limited to 'llvm/test/CodeGen/Mips/and1.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/and1.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/and1.ll b/llvm/test/CodeGen/Mips/and1.ll new file mode 100644 index 00000000000..4ff1204fe7a --- /dev/null +++ b/llvm/test/CodeGen/Mips/and1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %and = and i32 %0, %1 +; 16: and ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %and) + ret i32 0 +} + +declare i32 @printf(i8*, ...) |
