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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-03-19 19:01:34 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-03-19 19:01:34 +0000
commitc2e35a6f3258d102b731c77de9530714c4d02802 (patch)
tree3227b67cb71f8609ec37dee8694a144c5c3b6316 /llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
parent77482120dae780444cff02fbe5ce4cdd8a71873a (diff)
downloadbcm5719-llvm-c2e35a6f3258d102b731c77de9530714c4d02802.tar.gz
bcm5719-llvm-c2e35a6f3258d102b731c77de9530714c4d02802.zip
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
The 2nd loop calculates spill costs but reports free registers as cost 0 anyway, so there is little benefit from having a separate early loop. Surprisingly this is not NFC, as many register are marked regDisabled so the first loop often picks up later registers unnecessarily instead of the first one available in the allocation order... Patch by Matthias Braun llvm-svn: 356499
Diffstat (limited to 'llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll')
-rw-r--r--llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
index 4babe892510..1aa2e421aaf 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
+++ b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
@@ -60,11 +60,11 @@ entry:
define i32 @select_with_negation(i32 %a, i32 %b, i32 %x, i32 %y) {
; MIPS32-LABEL: select_with_negation:
; MIPS32: # %bb.0: # %entry
-; MIPS32-NEXT: slt $4, $4, $5
-; MIPS32-NEXT: not $4, $4
-; MIPS32-NEXT: ori $5, $zero, 1
-; MIPS32-NEXT: and $4, $4, $5
-; MIPS32-NEXT: movn $7, $6, $4
+; MIPS32-NEXT: slt $1, $4, $5
+; MIPS32-NEXT: not $1, $1
+; MIPS32-NEXT: ori $2, $zero, 1
+; MIPS32-NEXT: and $1, $1, $2
+; MIPS32-NEXT: movn $7, $6, $1
; MIPS32-NEXT: move $2, $7
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
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