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| author | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-05-12 12:08:31 +0000 |
|---|---|---|
| committer | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-05-12 12:08:31 +0000 |
| commit | 32cd69a2ebc1ca06ceba22c3a19899dcddeabf35 (patch) | |
| tree | 62f06dd24f5783eac49b66e8461a0d4e1ea576fe /llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll | |
| parent | 90476a5d90467e1300cd64cf3904ff44fd94a030 (diff) | |
| download | bcm5719-llvm-32cd69a2ebc1ca06ceba22c3a19899dcddeabf35.tar.gz bcm5719-llvm-32cd69a2ebc1ca06ceba22c3a19899dcddeabf35.zip | |
[mips][FastISel] Allow computation of addresses from constant expressions.
Summary:
Try to compute addresses when the offset from a memory location is a constant
expression.
Based on a patch by Reed Kotler.
Test Plan:
Passes test-suite for -O0/O2 and mips 32 r1/r2
Reviewers: rkotler, dsanders
Subscribers: llvm-commits, aemerson, rfuhler
Differential Revision: http://reviews.llvm.org/D6767
llvm-svn: 237117
Diffstat (limited to 'llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll b/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll new file mode 100644 index 00000000000..df60d807183 --- /dev/null +++ b/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \ +; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s +; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \ +; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s + +@ARR = external global [10 x i32], align 4 + +define void @foo() { +; CHECK-LABEL: foo + +; CHECK-DAG: lw $[[ARR:[0-9]+]], %got(ARR)({{.*}}) +; CHECK-DAG: addiu $[[T0:[0-9]+]], $zero, 12345 +; CHECK: sw $[[T0]], 8($[[ARR]]) + +entry: + store i32 12345, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ARR, i32 0, i32 2), align 4 + ret void +} |
