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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/MSP430/Inst16mr.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/MSP430/Inst16mr.ll')
| -rw-r--r-- | llvm/test/CodeGen/MSP430/Inst16mr.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/MSP430/Inst16mr.ll b/llvm/test/CodeGen/MSP430/Inst16mr.ll index 20100489368..50dc4c0b673 100644 --- a/llvm/test/CodeGen/MSP430/Inst16mr.ll +++ b/llvm/test/CodeGen/MSP430/Inst16mr.ll @@ -13,7 +13,7 @@ define void @mov(i16 %a) nounwind { define void @add(i16 %a) nounwind { ; CHECK-LABEL: add: ; CHECK: add.w r15, &foo - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = add i16 %a, %1 store i16 %2, i16* @foo ret void @@ -22,7 +22,7 @@ define void @add(i16 %a) nounwind { define void @and(i16 %a) nounwind { ; CHECK-LABEL: and: ; CHECK: and.w r15, &foo - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = and i16 %a, %1 store i16 %2, i16* @foo ret void @@ -31,7 +31,7 @@ define void @and(i16 %a) nounwind { define void @bis(i16 %a) nounwind { ; CHECK-LABEL: bis: ; CHECK: bis.w r15, &foo - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = or i16 %a, %1 store i16 %2, i16* @foo ret void @@ -41,7 +41,7 @@ define void @bic(i16 zeroext %m) nounwind { ; CHECK-LABEL: bic: ; CHECK: bic.w r15, &foo %1 = xor i16 %m, -1 - %2 = load i16* @foo + %2 = load i16, i16* @foo %3 = and i16 %2, %1 store i16 %3, i16* @foo ret void @@ -50,7 +50,7 @@ define void @bic(i16 zeroext %m) nounwind { define void @xor(i16 %a) nounwind { ; CHECK-LABEL: xor: ; CHECK: xor.w r15, &foo - %1 = load i16* @foo + %1 = load i16, i16* @foo %2 = xor i16 %a, %1 store i16 %2, i16* @foo ret void |
