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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-07-10 12:57:49 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-07-10 12:57:49 +0000 |
commit | c052451a02c30b5335a72d29e7dc16aef98f7e23 (patch) | |
tree | eb195f1eba04ff060f7e75bae49c5874715bc160 /llvm/test/CodeGen/Hexagon | |
parent | 6a9c719ee1be4562a9e16f2c71ac3e51ef9c4292 (diff) | |
download | bcm5719-llvm-c052451a02c30b5335a72d29e7dc16aef98f7e23.tar.gz bcm5719-llvm-c052451a02c30b5335a72d29e7dc16aef98f7e23.zip |
[Hexagon] Add implicit uses even when untied explicit uses are present
An explicit untied use is not sufficient to maintain liveness of a
register redefined in a predicated instruction. For example
%1 = COPY %0
...
%1 = A2_paddif %2, %1, 1
could become
$r1 = COPY $r0
...
$r1 = A2_paddif $p0, $r1, 1
and later
$r1 = COPY $r0 ;; this is not really dead!
...
$r1 = A2_paddif $p0, $r0, 1
llvm-svn: 336662
Diffstat (limited to 'llvm/test/CodeGen/Hexagon')
-rw-r--r-- | llvm/test/CodeGen/Hexagon/expand-condsets-impuse2.mir | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-impuse2.mir b/llvm/test/CodeGen/Hexagon/expand-condsets-impuse2.mir new file mode 100644 index 00000000000..809745e3fe8 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/expand-condsets-impuse2.mir @@ -0,0 +1,24 @@ +# RUN: llc -march=hexagon -run-pass=expand-condsets %s -o - | FileCheck %s + +# Check that there is a tied implicit use despite having an explicit (but +# untied) use: +# CHECK: %[[R:[0-9]+]]:intregs = A2_paddif killed %{{[0-9]+}}, %[[R]], 1, implicit %[[R]](tied-def 0) + +name: f0 +tracksRegLiveness: true +body: | + bb.0: + successors: %bb.1 + liveins: $r0, $r1 + %0:intregs = COPY $r0 + %1:intregs = COPY $r1 + %2:intregs = COPY $r0 + %3:intregs = M2_mpyi %2, %1 + %4:intregs = A2_sub %0, %3 + %5:predregs = C2_cmpeqi %4, 0 + %6:intregs = A2_addi %2, 1 + %7:intregs = C2_mux %5, %2, %6 + + bb.1: + +... |