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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-11-26 16:35:41 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-11-26 16:35:41 +0000 |
| commit | daa4b6fbd933fe81bac1cb22b12f78bf1e3628ef (patch) | |
| tree | 91a51285dd42a2c3f911a4c61be567ee165b2b10 /llvm/test/CodeGen/Hexagon/v60Intrins.ll | |
| parent | e4fbec4a37ce2079fa53ddb1d79c8fbd070877ed (diff) | |
| download | bcm5719-llvm-daa4b6fbd933fe81bac1cb22b12f78bf1e3628ef.tar.gz bcm5719-llvm-daa4b6fbd933fe81bac1cb22b12f78bf1e3628ef.zip | |
[mips][ias] Range check uimm5 operands and fix several bugs this revealed.
Summary:
The bugs were:
* append, prepend, and balign were not tested
* balign takes a uimm2 not a uimm5.
* drotr32 was correctly implemented with a uimm5 but the tests expected
'52' to be valid.
* li/la were implemented with a uimm5 instead of simm32. simm32 isn't
completely correct either but I'll fix that when I get to simm32.
A notable omission are some of the shift instructions. Several of these
have been implemented using a single uimm6 instruction (rather than two
uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated
in the uimm6 patch.
Reviewers: vkalintiris
Subscribers: llvm-commits, dsanders
Differential Revision: http://reviews.llvm.org/D14712
llvm-svn: 254164
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/v60Intrins.ll')
0 files changed, 0 insertions, 0 deletions
