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author | Brendon Cahoon <bcahoon@codeaurora.org> | 2015-05-08 20:18:21 +0000 |
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committer | Brendon Cahoon <bcahoon@codeaurora.org> | 2015-05-08 20:18:21 +0000 |
commit | bece8edcdde53f9854a7edfc27890333281541cc (patch) | |
tree | 6ab06d6bb641c3def7b22544a194f9df460546df /llvm/test/CodeGen/Hexagon/hwloop1.ll | |
parent | 82d9f037fe3cc48d645094cf271937c150036b13 (diff) | |
download | bcm5719-llvm-bece8edcdde53f9854a7edfc27890333281541cc.tar.gz bcm5719-llvm-bece8edcdde53f9854a7edfc27890333281541cc.zip |
[Hexagon] Generate more hardware loops
Refactored parts of the hardware loop pass to generate
more. Also, added more tests.
Differential Revision: http://reviews.llvm.org/D9568
llvm-svn: 236896
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/hwloop1.ll')
-rw-r--r-- | llvm/test/CodeGen/Hexagon/hwloop1.ll | 161 |
1 files changed, 161 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/hwloop1.ll b/llvm/test/CodeGen/Hexagon/hwloop1.ll new file mode 100644 index 00000000000..97b779cf962 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/hwloop1.ll @@ -0,0 +1,161 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s +; Check that we generate hardware loop instructions. + +; Case 1 : Loop with a constant number of iterations. +; CHECK-LABEL: @hwloop1 +; CHECK: loop0(.LBB{{.}}_{{.}}, #10) +; CHECK: endloop0 + +@a = common global [10 x i32] zeroinitializer, align 4 +define i32 @hwloop1() nounwind { +entry: + br label %for.body +for.body: + %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* @a, i32 0, i32 %i.01 + store i32 %i.01, i32* %arrayidx, align 4 + %inc = add nsw i32 %i.01, 1 + %exitcond = icmp eq i32 %inc, 10 + br i1 %exitcond, label %for.end, label %for.body +for.end: + ret i32 0 +} + +; Case 2 : Loop with a run-time number of iterations. +; CHECK-LABEL: @hwloop2 +; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}}) +; CHECK: endloop0 + +define i32 @hwloop2(i32 %n, i32* nocapture %b) nounwind { +entry: + %cmp1 = icmp sgt i32 %n, 0 + br i1 %cmp1, label %for.body.preheader, label %for.end + +for.body.preheader: + br label %for.body + +for.body: + %a.03 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] + %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ] + %arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.02 + %0 = load i32, i32* %arrayidx, align 4 + %add = add nsw i32 %0, %a.03 + %inc = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %inc, %n + br i1 %exitcond, label %for.end.loopexit, label %for.body + +for.end.loopexit: + br label %for.end + +for.end: + %a.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ] + ret i32 %a.0.lcssa +} + +; Case 3 : Induction variable increment more than 1. +; CHECK-LABEL: @hwloop3 +; CHECK: lsr(r{{[0-9]+}}, #2) +; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}}) +; CHECK: endloop0 + +define i32 @hwloop3(i32 %n, i32* nocapture %b) nounwind { +entry: + %cmp1 = icmp sgt i32 %n, 0 + br i1 %cmp1, label %for.body.preheader, label %for.end + +for.body.preheader: + br label %for.body + +for.body: + %a.03 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] + %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ] + %arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.02 + %0 = load i32, i32* %arrayidx, align 4 + %add = add nsw i32 %0, %a.03 + %inc = add nsw i32 %i.02, 4 + %exitcond = icmp eq i32 %inc, %n + br i1 %exitcond, label %for.end.loopexit, label %for.body + +for.end.loopexit: + br label %for.end + +for.end: + %a.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ] + ret i32 %a.0.lcssa +} + +; Case 4 : Loop exit compare uses register instead of immediate value. +; CHECK-LABEL: @hwloop4 +; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}}) +; CHECK: endloop0 + +define i32 @hwloop4(i32 %n, i32* nocapture %b) nounwind { +entry: + %cmp1 = icmp sgt i32 %n, 0 + br i1 %cmp1, label %for.body.preheader, label %for.end + +for.body.preheader: + br label %for.body + +for.body: + %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ] + %arrayidx = getelementptr inbounds i32, i32* %b, i32 %i.02 + store i32 %i.02, i32* %arrayidx, align 4 + %inc = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %inc, %n + br i1 %exitcond, label %for.end.loopexit, label %for.body + +for.end.loopexit: + br label %for.end + +for.end: + ret i32 0 +} + +; Case 5: After LSR, the initial value is 100 and the iv decrements to 0. +; CHECK-LABEL: @hwloop5 +; CHECK: loop0(.LBB{{.}}_{{.}}, #100) +; CHECK: endloop0 + +define void @hwloop5(i32* nocapture %a, i32* nocapture %res) nounwind { +entry: + br label %for.body + +for.body: + %i.03 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.03 + %0 = load i32, i32* %arrayidx, align 4 + %mul = mul nsw i32 %0, %0 + %arrayidx2 = getelementptr inbounds i32, i32* %res, i32 %i.03 + store i32 %mul, i32* %arrayidx2, align 4 + %inc = add nsw i32 %i.03, 1 + %exitcond = icmp eq i32 %inc, 100 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +; Case 6: Large immediate offset +; CHECK-LABEL: @hwloop6 +; CHECK-NOT: loop0(.LBB{{.}}_{{.}}, #1024) +; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}}) +; CHECK: endloop0 + +define void @hwloop6(i32* nocapture %a, i32* nocapture %res) nounwind { +entry: + br label %for.body + +for.body: + %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.02 + %0 = load i32, i32* %arrayidx, align 4 + %arrayidx1 = getelementptr inbounds i32, i32* %res, i32 %i.02 + store i32 %0, i32* %arrayidx1, align 4 + %inc = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %inc, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} |