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| author | Brendon Cahoon <bcahoon@codeaurora.org> | 2015-05-08 20:18:21 +0000 |
|---|---|---|
| committer | Brendon Cahoon <bcahoon@codeaurora.org> | 2015-05-08 20:18:21 +0000 |
| commit | bece8edcdde53f9854a7edfc27890333281541cc (patch) | |
| tree | 6ab06d6bb641c3def7b22544a194f9df460546df /llvm/test/CodeGen/Hexagon/hwloop-preheader.ll | |
| parent | 82d9f037fe3cc48d645094cf271937c150036b13 (diff) | |
| download | bcm5719-llvm-bece8edcdde53f9854a7edfc27890333281541cc.tar.gz bcm5719-llvm-bece8edcdde53f9854a7edfc27890333281541cc.zip | |
[Hexagon] Generate more hardware loops
Refactored parts of the hardware loop pass to generate
more. Also, added more tests.
Differential Revision: http://reviews.llvm.org/D9568
llvm-svn: 236896
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/hwloop-preheader.ll')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/hwloop-preheader.ll | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll b/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll new file mode 100644 index 00000000000..66efd2089fc --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv5 -hexagon-hwloop-preheader < %s +; REQUIRES: asserts + +; Test that the preheader is added to the parent loop, otherwise +; we generate an invalid hardware loop. + +; Function Attrs: nounwind readonly +define void @test(i16 signext %n) #0 { +entry: + br i1 undef, label %for.cond4.preheader.preheader.split.us, label %for.end22 + +for.cond4.preheader.preheader.split.us: + %0 = sext i16 %n to i32 + br label %for.body9.preheader.us + +for.body9.us: + %indvars.iv = phi i32 [ %indvars.iv.next.7, %for.body9.us ], [ 0, %for.body9.preheader.us ] + %indvars.iv.next.7 = add i32 %indvars.iv, 8 + %lftr.wideiv.7 = trunc i32 %indvars.iv.next.7 to i16 + %exitcond.7 = icmp slt i16 %lftr.wideiv.7, 0 + br i1 %exitcond.7, label %for.body9.us, label %for.body9.us.ur + +for.body9.preheader.us: + %i.030.us.pmt = phi i32 [ %inc21.us.pmt, %for.end.loopexit.us ], [ 0, %for.cond4.preheader.preheader.split.us ] + br i1 undef, label %for.body9.us, label %for.body9.us.ur + +for.body9.us.ur: + %exitcond.ur.old = icmp eq i16 undef, %n + br i1 %exitcond.ur.old, label %for.end.loopexit.us, label %for.body9.us.ur + +for.end.loopexit.us: + %inc21.us.pmt = add i32 %i.030.us.pmt, 1 + %exitcond33 = icmp eq i32 %inc21.us.pmt, %0 + br i1 %exitcond33, label %for.end22, label %for.body9.preheader.us + +for.end22: + ret void +} + +attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } |
