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authorChandler Carruth <chandlerc@gmail.com>2012-04-23 18:25:57 +0000
committerChandler Carruth <chandlerc@gmail.com>2012-04-23 18:25:57 +0000
commit3c3bb55a85645f6fba216f7fac2df55be53eaebb (patch)
treee60ac49ee214d7b0681b1a5f56cf701aca77bd7c /llvm/test/CodeGen/Hexagon/convertsptoint.ll
parent70ac923ebce80aff567880d577896c275ddbf171 (diff)
downloadbcm5719-llvm-3c3bb55a85645f6fba216f7fac2df55be53eaebb.tar.gz
bcm5719-llvm-3c3bb55a85645f6fba216f7fac2df55be53eaebb.zip
Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get worse, so I'm reverting all of them. Please resubmit these patches, one at a time, after verifying that the regression test suite passes. Never submit a patch without running the regression test suite. llvm-svn: 155372
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/convertsptoint.ll')
-rw-r--r--llvm/test/CodeGen/Hexagon/convertsptoint.ll26
1 files changed, 0 insertions, 26 deletions
diff --git a/llvm/test/CodeGen/Hexagon/convertsptoint.ll b/llvm/test/CodeGen/Hexagon/convertsptoint.ll
deleted file mode 100644
index b8a9d6c8083..00000000000
--- a/llvm/test/CodeGen/Hexagon/convertsptoint.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
-; Check that we generate conversion from single precision floating point
-; to 32-bit int value in IEEE complaint mode in V5.
-
-; CHECK: r{{[0-9]+}} = convert_sf2w(r{{[0-9]+}}):chop
-
-define i32 @main() nounwind {
-entry:
- %retval = alloca i32, align 4
- %i = alloca i32, align 4
- %a = alloca float, align 4
- %b = alloca float, align 4
- %c = alloca float, align 4
- store i32 0, i32* %retval
- store float 0x402ECCCCC0000000, float* %a, align 4
- store float 0x4022333340000000, float* %b, align 4
- %0 = load float* %a, align 4
- %1 = load float* %b, align 4
- %add = fadd float %0, %1
- store float %add, float* %c, align 4
- %2 = load float* %c, align 4
- %conv = fptosi float %2 to i32
- store i32 %conv, i32* %i, align 4
- %3 = load i32* %i, align 4
- ret i32 %3
-}
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