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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-08-02 22:17:53 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-08-02 22:17:53 +0000 |
commit | d91a9e27a987fa3e314c6d536b767e50195bb5a8 (patch) | |
tree | a43e4f748b43765de08759eee0f22827c688d4fb /llvm/test/CodeGen/Hexagon/bitconvert-vector.ll | |
parent | f0a57378aa2f16a9f4c9517f761ce35f78ee062f (diff) | |
download | bcm5719-llvm-d91a9e27a987fa3e314c6d536b767e50195bb5a8.tar.gz bcm5719-llvm-d91a9e27a987fa3e314c6d536b767e50195bb5a8.zip |
[Hexagon] Simplify CFG after atomic expansion
This will remove suboptimal branching from the generated ll/sc loops.
The extra simplification pass affects a lot of testcases, which have
been modified to accommodate this change: either by modifying the
test to become immune to the CFG simplification, or (less preferablt)
by adding option -hexagon-initial-cfg-clenaup=0.
llvm-svn: 338774
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/bitconvert-vector.ll')
-rw-r--r-- | llvm/test/CodeGen/Hexagon/bitconvert-vector.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll b/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll index 584cbca1ff4..21846c90f5b 100644 --- a/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll +++ b/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll @@ -11,15 +11,15 @@ declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #0 declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #0 declare <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32>, <32 x i32>, i32) #0 -define void @fred() #1 { +define void @fred(<64 x i16>* %a0, <32 x i32>* %a1) #1 { entry: %t0 = bitcast <64 x i16> zeroinitializer to <32 x i32> %t1 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %t0, <32 x i32> undef, i32 2) %t2 = tail call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> undef, <32 x i32> %t1, i32 -2) %t3 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %t2) - store <64 x i16> zeroinitializer, <64 x i16>* undef, align 128 - store <32 x i32> %t3, <32 x i32>* undef, align 128 - unreachable + store <64 x i16> zeroinitializer, <64 x i16>* %a0, align 128 + store <32 x i32> %t3, <32 x i32>* %a1, align 128 + ret void } |