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| author | Sumanth Gundapaneni <sgundapa@codeaurora.org> | 2017-10-18 18:07:07 +0000 |
|---|---|---|
| committer | Sumanth Gundapaneni <sgundapa@codeaurora.org> | 2017-10-18 18:07:07 +0000 |
| commit | e1983bcf552980433a7a8ed7a2ae31ded4ae9b4a (patch) | |
| tree | a971d5be4ebd3445c32d5c802eac212ce2843964 /llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll | |
| parent | 265d253aae7b6d44618e07db7ee042b4b1aeb9c6 (diff) | |
| download | bcm5719-llvm-e1983bcf552980433a7a8ed7a2ae31ded4ae9b4a.tar.gz bcm5719-llvm-e1983bcf552980433a7a8ed7a2ae31ded4ae9b4a.zip | |
[Hexagon] New HVX target features.
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"
For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"
Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.
Differential Revision: https://reviews.llvm.org/D38851
llvm-svn: 316101
Diffstat (limited to 'llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll b/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll index db57998aeb6..e7dd87c1da1 100644 --- a/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll +++ b/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll @@ -24,7 +24,7 @@ for.end: ; preds = %for.body, %entry declare hidden i64 @danny(i32*, i32* nocapture readonly dereferenceable(4)) #1 align 2 declare hidden i32 @sammy(i32* nocapture, i32) #0 align 2 -attributes #0 = { nounwind optsize "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind optsize readonly "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind optsize "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind optsize readonly "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #2 = { optsize } |
