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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-22 11:51:06 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-22 11:51:06 +0000 |
| commit | e1f46e58c9bc0603fdd17a87b289465c87e6a487 (patch) | |
| tree | ed9d685906cd78f62898ae37a874d56b13edb53a /llvm/test/CodeGen/Generic | |
| parent | 1f6c7e935895539710add35c5726140e99af679d (diff) | |
| download | bcm5719-llvm-e1f46e58c9bc0603fdd17a87b289465c87e6a487.tar.gz bcm5719-llvm-e1f46e58c9bc0603fdd17a87b289465c87e6a487.zip | |
[mips] Change lwl and lwr in inlineasm_constraint.ll to lw
Summary:
lwl and lwr are not available in MIPS32r6/MIPS64r6. The purpose of the test
is to check that the '$1' expands to '0($x)' rather than to test something related
to the lwl or lwr instructions so we can simply switch to lw.
Depends on D3842
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3844
llvm-svn: 209423
Diffstat (limited to 'llvm/test/CodeGen/Generic')
0 files changed, 0 insertions, 0 deletions
