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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2018-02-09 00:10:31 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2018-02-09 00:10:31 +0000 |
| commit | 39ec2e95ae6bb24940a1aecdf51d4a096cc0c9de (patch) | |
| tree | 0a21014889fcdc3d0c230a45afad2b757b4c28fd /llvm/test/CodeGen/Generic/MachineBranchProb.ll | |
| parent | d42b1c0534e04e988406f02c2161f4d84720d4b5 (diff) | |
| download | bcm5719-llvm-39ec2e95ae6bb24940a1aecdf51d4a096cc0c9de.tar.gz bcm5719-llvm-39ec2e95ae6bb24940a1aecdf51d4a096cc0c9de.zip | |
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
Instead of:
Successors according to CFG: %bb.6(0x12492492 / 0x80000000 = 14.29%)
print:
successors: %bb.6(0x12492492); %bb.6(14.29%)
llvm-svn: 324685
Diffstat (limited to 'llvm/test/CodeGen/Generic/MachineBranchProb.ll')
| -rw-r--r-- | llvm/test/CodeGen/Generic/MachineBranchProb.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/Generic/MachineBranchProb.ll b/llvm/test/CodeGen/Generic/MachineBranchProb.ll index f0d0996ff81..85fafba227a 100644 --- a/llvm/test/CodeGen/Generic/MachineBranchProb.ll +++ b/llvm/test/CodeGen/Generic/MachineBranchProb.ll @@ -22,13 +22,13 @@ entry: i64 15, label %sw.bb ], !prof !0 ; CHECK: bb.0.entry: -; CHECK: Successors according to CFG: %bb.1({{[0-9a-fx/= ]+}}92.17%) %bb.4({{[0-9a-fx/= ]+}}7.83%) +; CHECK: successors: %bb.1(0x75f8ebf2), %bb.4(0x0a07140e) ; CHECK: bb.4.entry: -; CHECK: Successors according to CFG: %bb.2({{[0-9a-fx/= ]+}}75.29%) %bb.5({{[0-9a-fx/= ]+}}24.71%) +; CHECK: successors: %bb.2(0x60606068), %bb.5(0x1f9f9f98) ; CHECK: bb.5.entry: -; CHECK: Successors according to CFG: %bb.1({{[0-9a-fx/= ]+}}47.62%) %bb.6({{[0-9a-fx/= ]+}}52.38%) +; CHECK: successors: %bb.1(0x3cf3cf4b), %bb.6(0x430c30b5) ; CHECK: bb.6.entry: -; CHECK: Successors according to CFG: %bb.1({{[0-9a-fx/= ]+}}36.36%) %bb.3({{[0-9a-fx/= ]+}}63.64%) +; CHECK: successors: %bb.1(0x2e8ba2d7), %bb.3(0x51745d29) sw.bb: ; this call will prevent simplifyCFG from optimizing the block away in ARM/AArch64. @@ -72,7 +72,7 @@ return: ret void ; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree: ; CHECK: bb.0.entry: ; CHECK-NOT: Successors -; CHECK: Successors according to CFG: %bb.8({{[0-9a-fx/= ]+}}39.71%) %bb.9({{[0-9a-fx/= ]+}}60.29%) +; CHECK: successors: %bb.8(0x32d2d2d3), %bb.9(0x4d2d2d2d) } !1 = !{!"branch_weights", |
