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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-04 17:18:51 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-04 17:18:51 +0000 |
| commit | 25528d6de70e98683722e28655d8568d5f09b5c7 (patch) | |
| tree | 061a9b3bfa623e3f38efd5fc02c6ec234acfcfde /llvm/test/CodeGen/Generic/MachineBranchProb.ll | |
| parent | 2b4385846c86078e0012e7bfb2e8dc6476ae8dd0 (diff) | |
| download | bcm5719-llvm-25528d6de70e98683722e28655d8568d5f09b5c7.tar.gz bcm5719-llvm-25528d6de70e98683722e28655d8568d5f09b5c7.zip | |
[CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.
The MIR printer prints the IR name of a MBB only for block definitions.
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix
Differential Revision: https://reviews.llvm.org/D40422
llvm-svn: 319665
Diffstat (limited to 'llvm/test/CodeGen/Generic/MachineBranchProb.ll')
| -rw-r--r-- | llvm/test/CodeGen/Generic/MachineBranchProb.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/Generic/MachineBranchProb.ll b/llvm/test/CodeGen/Generic/MachineBranchProb.ll index 75e9a191e3d..dc4a52ab711 100644 --- a/llvm/test/CodeGen/Generic/MachineBranchProb.ll +++ b/llvm/test/CodeGen/Generic/MachineBranchProb.ll @@ -21,14 +21,14 @@ entry: i64 5, label %sw.bb1 i64 15, label %sw.bb ], !prof !0 -; CHECK: BB#0: derived from LLVM BB %entry -; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}92.17%) BB#4({{[0-9a-fx/= ]+}}7.83%) -; CHECK: BB#4: derived from LLVM BB %entry -; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}75.29%) BB#5({{[0-9a-fx/= ]+}}24.71%) -; CHECK: BB#5: derived from LLVM BB %entry -; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}47.62%) BB#6({{[0-9a-fx/= ]+}}52.38%) -; CHECK: BB#6: derived from LLVM BB %entry -; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%) +; CHECK: %bb.0: derived from LLVM BB %entry +; CHECK: Successors according to CFG: %bb.1({{[0-9a-fx/= ]+}}92.17%) %bb.4({{[0-9a-fx/= ]+}}7.83%) +; CHECK: %bb.4: derived from LLVM BB %entry +; CHECK: Successors according to CFG: %bb.2({{[0-9a-fx/= ]+}}75.29%) %bb.5({{[0-9a-fx/= ]+}}24.71%) +; CHECK: %bb.5: derived from LLVM BB %entry +; CHECK: Successors according to CFG: %bb.1({{[0-9a-fx/= ]+}}47.62%) %bb.6({{[0-9a-fx/= ]+}}52.38%) +; CHECK: %bb.6: derived from LLVM BB %entry +; CHECK: Successors according to CFG: %bb.1({{[0-9a-fx/= ]+}}36.36%) %bb.3({{[0-9a-fx/= ]+}}63.64%) sw.bb: ; this call will prevent simplifyCFG from optimizing the block away in ARM/AArch64. @@ -70,9 +70,9 @@ return: ret void ; right with weight 20. ; ; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree: -; CHECK: BB#0: derived from LLVM BB %entry +; CHECK: %bb.0: derived from LLVM BB %entry ; CHECK-NOT: Successors -; CHECK: Successors according to CFG: BB#8({{[0-9a-fx/= ]+}}39.71%) BB#9({{[0-9a-fx/= ]+}}60.29%) +; CHECK: Successors according to CFG: %bb.8({{[0-9a-fx/= ]+}}39.71%) %bb.9({{[0-9a-fx/= ]+}}60.29%) } !1 = !{!"branch_weights", |
