diff options
| author | Scott Michel <scottm@aero.org> | 2009-01-21 04:58:48 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2009-01-21 04:58:48 +0000 |
| commit | ed7d79fce4ed71e21d8492d144edf0c19cecf080 (patch) | |
| tree | 50f468a35e35c7c4c980fafffc79538b438bdf4d /llvm/test/CodeGen/CellSPU/fneg-fabs.ll | |
| parent | a70798cc9ab10106649819222840600cd703158b (diff) | |
| download | bcm5719-llvm-ed7d79fce4ed71e21d8492d144edf0c19cecf080.tar.gz bcm5719-llvm-ed7d79fce4ed71e21d8492d144edf0c19cecf080.zip | |
CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
Discovered interesting DAGCombiner feature, which is currently solved via
custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
insists on inserting one anyway.)
- Update README.
llvm-svn: 62664
Diffstat (limited to 'llvm/test/CodeGen/CellSPU/fneg-fabs.ll')
| -rw-r--r-- | llvm/test/CodeGen/CellSPU/fneg-fabs.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/CellSPU/fneg-fabs.ll b/llvm/test/CodeGen/CellSPU/fneg-fabs.ll index 045bb052989..70220a563d9 100644 --- a/llvm/test/CodeGen/CellSPU/fneg-fabs.ll +++ b/llvm/test/CodeGen/CellSPU/fneg-fabs.ll @@ -1,9 +1,9 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s -; RUN: grep fsmbi %t1.s | count 3 +; RUN: grep fsmbi %t1.s | count 2 ; RUN: grep 32768 %t1.s | count 2 ; RUN: grep xor %t1.s | count 4 -; RUN: grep and %t1.s | count 5 -; RUN: grep andbi %t1.s | count 3 +; RUN: grep and %t1.s | count 4 +; RUN: grep andbi %t1.s | count 2 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" |
