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authorYonghong Song <yhs@fb.com>2019-12-19 15:21:53 -0800
committerYonghong Song <yhs@fb.com>2019-12-26 09:07:39 -0800
commitffd57408efd4c8d455616a5ff4f623250e8580c9 (patch)
tree099378449113ec639605833bf962c32f783aa5c6 /llvm/test/CodeGen/BPF
parent6c5d1f40ff8deb2c001736c5a5bc085322910ad1 (diff)
downloadbcm5719-llvm-ffd57408efd4c8d455616a5ff4f623250e8580c9.tar.gz
bcm5719-llvm-ffd57408efd4c8d455616a5ff4f623250e8580c9.zip
[BPF] Enable relocation location for load/store/shifts
Previous btf field relocation is always at assignment like r1 = 4 which is converted from an ld_imm64 instruction. This patch did an optimization such that relocation instruction might be load/store/shift. Specically, the following insns may also have relocation, except BPF_MOV: LDB, LDH, LDW, LDD, STB, STH, STW, STD, LDB32, LDH32, LDW32, STB32, STH32, STW32, SLL, SRL, SRA To accomplish this, a few BPF target specific codegen only instructions are invented. They are generated at backend BPF SimplifyPatchable phase, which is at early llc phase when SSA form is available. The new codegen only instructions will be converted to real proper instructions at the codegen and BTF emission stage. Note that, as revealed by a few tests, this optimization might be actual generating more relocations: Scenario 1: if (...) { ... __builtin_preserve_field_info(arg->b2, 0) ... } else { ... __builtin_preserve_field_info(arg->b2, 0) ... } Compiler could do CSE to only have one relocation. But if both of the above is translated into codegen internal instructions, the compiler will not be able to do that. Scenario 2: offset = ... __builtin_preserve_field_info(arg->b2, 0) ... ... ... offset ... ... offset ... ... offset ... For whatever reason, the compiler might be temporarily do copy propagation of the righthand of "offset" assignment like ... __builtin_preserve_field_info(arg->b2, 0) ... ... __builtin_preserve_field_info(arg->b2, 0) ... and CSE will be able to deduplicate later. But if these intrinsics are converted to BPF pseudo instructions, they will not be able to get deduplicated. I do not expect we have big instruction count difference. It may actually reduce instruction count since now relocation is in deeper insn dependency chain. For example, for test offset-reloc-fieldinfo-2.ll, this patch generates 7 instead of 6 relocations for non-alu32 mode, but it actually reduced instruction count from 29 to 26. Differential Revision: https://reviews.llvm.org/D71790
Diffstat (limited to 'llvm/test/CodeGen/BPF')
-rw-r--r--llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll6
-rw-r--r--llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll11
-rw-r--r--llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll26
3 files changed, 28 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll b/llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
index 872f69ebf29..a0dd6c8da77 100644
--- a/llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
+++ b/llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
@@ -20,10 +20,8 @@ entry:
}
; CHECK-LABEL: test
-; CHECK: r2 = 4
-; CHECK: r1 += r2
-; CHECK-ALU64: r0 = *(u32 *)(r1 + 0)
-; CHECK-ALU32: w0 = *(u32 *)(r1 + 0)
+; CHECK-ALU64: r0 = *(u32 *)(r1 + 4)
+; CHECK-ALU32: w0 = *(u32 *)(r1 + 4)
; CHECK: exit
;
; CHECK: .long 1 # BTF_KIND_STRUCT(id = 2)
diff --git a/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll b/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
index aa60d0c0a1b..d7e48d39041 100644
--- a/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
+++ b/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
@@ -73,8 +73,9 @@ entry:
; CHECK: r{{[0-9]+}} = 4
; CHECK: r{{[0-9]+}} = 4
-; CHECK: r{{[0-9]+}} = 51
-; CHECK: r{{[0-9]+}} = 60
+; CHECK: r{{[0-9]+}} <<= 51
+; CHECK: r{{[0-9]+}} s>>= 60
+; CHECK: r{{[0-9]+}} >>= 60
; CHECK: r{{[0-9]+}} = 1
; CHECK: .byte 115 # string offset=1
@@ -83,7 +84,7 @@ entry:
; CHECK: .long 16 # FieldReloc
; CHECK-NEXT: .long 30 # Field reloc section string offset=30
-; CHECK-NEXT: .long 5
+; CHECK-NEXT: .long 6
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 73
@@ -103,6 +104,10 @@ entry:
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 73
+; CHECK-NEXT: .long 5
+; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
+; CHECK-NEXT: .long 2
+; CHECK-NEXT: .long 73
; CHECK-NEXT: .long 3
; Function Attrs: argmemonly nounwind willreturn
diff --git a/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll b/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
index 929afd7f319..01af9d8a697 100644
--- a/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
+++ b/llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
@@ -1,7 +1,7 @@
-; RUN: llc -march=bpfel -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EL %s
-; RUN: llc -march=bpfeb -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EB %s
-; RUN: llc -march=bpfel -mattr=+alu32 -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EL %s
-; RUN: llc -march=bpfeb -mattr=+alu32 -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EB %s
+; RUN: llc -march=bpfel -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EL,CHECK64 %s
+; RUN: llc -march=bpfeb -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EB,CHECK64 %s
+; RUN: llc -march=bpfel -mattr=+alu32 -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EL,CHECK32 %s
+; RUN: llc -march=bpfeb -mattr=+alu32 -filetype=asm -o - %s | FileCheck -check-prefixes=CHECK,CHECK-EB,CHECK32 %s
; Source code:
; struct s {
; int a;
@@ -114,9 +114,10 @@ sw.epilog: ; preds = %entry, %sw.bb9, %sw
; CHECK: r{{[0-9]+}} = 4
; CHECK: r{{[0-9]+}} = 4
-; CHECK-EL: r{{[0-9]+}} = 51
-; CHECK-EB: r{{[0-9]+}} = 41
-; CHECK: r{{[0-9]+}} = 60
+; CHECK-EL: r{{[0-9]+}} <<= 51
+; CHECK-EB: r{{[0-9]+}} <<= 41
+; CHECK: r{{[0-9]+}} s>>= 60
+; CHECK: r{{[0-9]+}} >>= 60
; CHECK: r{{[0-9]+}} = 1
; CHECK: .long 1 # BTF_KIND_STRUCT(id = 2)
@@ -126,7 +127,8 @@ sw.epilog: ; preds = %entry, %sw.bb9, %sw
; CHECK: .long 16 # FieldReloc
; CHECK-NEXT: .long 30 # Field reloc section string offset=30
-; CHECK-NEXT: .long 5
+; CHECK32: .long 6
+; CHECK64: .long 7
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 36
@@ -135,6 +137,10 @@ sw.epilog: ; preds = %entry, %sw.bb9, %sw
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 36
; CHECK-NEXT: .long 1
+; CHECK64: .long .Ltmp{{[0-9]+}}
+; CHECK64: .long 2
+; CHECK64: .long 36
+; CHECK64: .long 0
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 36
@@ -146,6 +152,10 @@ sw.epilog: ; preds = %entry, %sw.bb9, %sw
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
; CHECK-NEXT: .long 2
; CHECK-NEXT: .long 36
+; CHECK-NEXT: .long 5
+; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
+; CHECK-NEXT: .long 2
+; CHECK-NEXT: .long 36
; CHECK-NEXT: .long 3
; Function Attrs: nounwind readnone
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