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| author | Jim Lin <tclin914@gmail.com> | 2019-12-23 11:24:20 +0800 |
|---|---|---|
| committer | Jim Lin <tclin914@gmail.com> | 2019-12-23 11:41:28 +0800 |
| commit | da0fe5db999baa659c2e386e5b0636dadfbbf759 (patch) | |
| tree | a12cb3b4d66ae4dcd8a10af7380967f52b75bf15 /llvm/test/CodeGen/AVR | |
| parent | 9681dc9627b1ea50fd90cdea84290ddc021d3fca (diff) | |
| download | bcm5719-llvm-da0fe5db999baa659c2e386e5b0636dadfbbf759.tar.gz bcm5719-llvm-da0fe5db999baa659c2e386e5b0636dadfbbf759.zip | |
[AVR] Fix codegen for rotate instructions
Summary:
This patch introduces the ROLBRd and RORBRd pseudo-instructions,
which implemenent the "traditional" rotate operations; instead of
the AVR rotate instructions that use the carry bit.
The code is not optimized at all. Especially when dealing with
loops of rotate instructions, this codegen should be improved some
day.
Related bug: 41358 <https://bugs.llvm.org/show_bug.cgi?id=41358>
//Note//: This is my first submitted patch.
Reviewers: dylanmckay, Jim
Reviewed By: dylanmckay
Subscribers: hiraditya, llvm-commits, dylanmckay, dsprenkels
Tags: #llvm
Patched by dsprenkels (Daan Sprenkels)
Differential Revision: https://reviews.llvm.org/D60365
Diffstat (limited to 'llvm/test/CodeGen/AVR')
| -rw-r--r-- | llvm/test/CodeGen/AVR/rot.ll | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AVR/rot.ll b/llvm/test/CodeGen/AVR/rot.ll index a7b77d97ba6..49981aabe7c 100644 --- a/llvm/test/CodeGen/AVR/rot.ll +++ b/llvm/test/CodeGen/AVR/rot.ll @@ -10,7 +10,8 @@ define i8 @rol8(i8 %val, i8 %amt) { ; CHECK-NEXT: breq LBB0_2 ; CHECK-NEXT: LBB0_1: - ; CHECK-NEXT: rol r24 + ; CHECK-NEXT: lsl r24 + ; CHECK-NEXT: adc r24, r1 ; CHECK-NEXT: subi r22, 1 ; CHECK-NEXT: brne LBB0_1 @@ -36,7 +37,10 @@ define i8 @ror8(i8 %val, i8 %amt) { ; CHECK-NEXT: breq LBB1_2 ; CHECK-NEXT: LBB1_1: - ; CHECK-NEXT: ror r24 + ; CHECK-NEXT: lsr r24 + ; CHECK-NEXT: ldi r0, 0 + ; CHECK-NEXT: ror r0 + ; CHECK-NEXT: or r24, r0 ; CHECK-NEXT: subi r22, 1 ; CHECK-NEXT: brne LBB1_1 |
