[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

Summary:
A number of optimizations are inhibited by single-use TokenFactors not
being merged into the TokenFactor using it. This makes we consider if
we can do the merge immediately.

Most tests changes here are due to the change in visitation causing
minor reorderings and associated reassociation of paired memory
operations.

CodeGen tests with non-reordering changes:

  X86/aligned-variadic.ll -- memory-based add folded into stored leaq
  value.

  X86/constant-combiners.ll -- Optimizes out overlap between stores.

  X86/pr40631_deadstore_elision -- folds constant byte store into
  preceding quad word constant store.

Reviewers: RKSimon, craig.topper, spatel, efriedma, courbet

Reviewed By: courbet

Subscribers: dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, eraman, hiraditya, kbarton, jrtc27, atanasyan, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59260

llvm-svn: 356068

2 files changed, 28 insertions, 28 deletions

diff --git a/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll b/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
index a5d4676b9b3..80a61a47cb2 100644
--- a/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
+++ b/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
@@ -66,24 +66,24 @@ define void @ret_void_args_i64(i64 %a) {
 
 ; CHECK-LABEL: ret_void_args_i64_i64
 define void @ret_void_args_i64_i64(i64 %a, i64 %b) {
-  ; CHECK:      sts     11, r25
-  ; CHECK-NEXT: sts     10, r24
-  ; CHECK-NEXT: sts     9, r23
-  ; CHECK-NEXT: sts     8, r22
-  ; CHECK-NEXT: sts     7, r21
-  ; CHECK-NEXT: sts     6, r20
-  ; CHECK-NEXT: sts     5, r19
-  ; CHECK-NEXT: sts     4, r18
+  ; CHECK-DAG:  sts     11, r25
+  ; CHECK-DAG: sts     10, r24
+  ; CHECK-DAG: sts     9, r23
+  ; CHECK-DAG: sts     8, r22
+  ; CHECK-DAG: sts     7, r21
+  ; CHECK-DAG: sts     6, r20
+  ; CHECK-DAG: sts     5, r19
+  ; CHECK-DAG: sts     4, r18
   store volatile i64 %a, i64* inttoptr (i64 4 to i64*)
 
-  ; CHECK-NEXT: sts     11, r17
-  ; CHECK-NEXT: sts     10, r16
-  ; CHECK-NEXT: sts     9, r15
-  ; CHECK-NEXT: sts     8, r14
-  ; CHECK-NEXT: sts     7, r13
-  ; CHECK-NEXT: sts     6, r12
-  ; CHECK-NEXT: sts     5, r11
-  ; CHECK-NEXT: sts     4, r10
+  ; CHECK-DAG: sts     11, r17
+  ; CHECK-DAG: sts     10, r16
+  ; CHECK-DAG: sts     9, r15
+  ; CHECK-DAG: sts     8, r14
+  ; CHECK-DAG: sts     7, r13
+  ; CHECK-DAG: sts     6, r12
+  ; CHECK-DAG: sts     5, r11
+  ; CHECK-DAG: sts     4, r10
   store volatile i64 %b, i64* inttoptr (i64 4 to i64*)
   ret void
 }
diff --git a/llvm/test/CodeGen/AVR/directmem.ll b/llvm/test/CodeGen/AVR/directmem.ll
index 6d2ddc536d2..6e1f72eceb8 100644
--- a/llvm/test/CodeGen/AVR/directmem.ll
+++ b/llvm/test/CodeGen/AVR/directmem.ll
@@ -207,10 +207,10 @@ define i32 @static32_inc() {
 ; CHECK: sbci r23, 255
 ; CHECK: sbci r24, 255
 ; CHECK: sbci r25, 255
-; CHECK: sts long.static+3, r25
-; CHECK: sts long.static+2, r24
-; CHECK: sts long.static+1, r23
-; CHECK: sts long.static, r22
+; CHECK-DAG: sts long.static+3, r25
+; CHECK-DAG: sts long.static+2, r24
+; CHECK-DAG: sts long.static+1, r23
+; CHECK-DAG: sts long.static, r22
   %1 = load i32, i32* @long.static
   %inc = add nsw i32 %1, 1
   store i32 %inc, i32* @long.static
@@ -309,14 +309,14 @@ define i64 @static64_inc() {
 ; CHECK: sbci r23, 255
 ; CHECK: sbci r24, 255
 ; CHECK: sbci r25, 255
-; CHECK: sts longlong.static+7, r25
-; CHECK: sts longlong.static+6, r24
-; CHECK: sts longlong.static+5, r23
-; CHECK: sts longlong.static+4, r22
-; CHECK: sts longlong.static+3, r21
-; CHECK: sts longlong.static+2, r20
-; CHECK: sts longlong.static+1, r19
-; CHECK: sts longlong.static, r18
+; CHECK-DAG: sts longlong.static+7, r25
+; CHECK-DAG: sts longlong.static+6, r24
+; CHECK-DAG: sts longlong.static+5, r23
+; CHECK-DAG: sts longlong.static+4, r22
+; CHECK-DAG: sts longlong.static+3, r21
+; CHECK-DAG: sts longlong.static+2, r20
+; CHECK-DAG: sts longlong.static+1, r19
+; CHECK-DAG: sts longlong.static, r18
   %1 = load i64, i64* @longlong.static
   %inc = add nsw i64 %1, 1
   store i64 %inc, i64* @longlong.static