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authorNico Rieck <nico.rieck@gmail.com>2014-05-23 19:06:24 +0000
committerNico Rieck <nico.rieck@gmail.com>2014-05-23 19:06:24 +0000
commitbd15945ab2ec683c05243820974816403e14fba6 (patch)
tree812a7ef0e97cb91aa7d9ff35ad7c7107e8951aa1 /llvm/test/CodeGen/ARM64
parentbbb6e4a8854a951d6c947fc059feb643e2199639 (diff)
downloadbcm5719-llvm-bd15945ab2ec683c05243820974816403e14fba6.tar.gz
bcm5719-llvm-bd15945ab2ec683c05243820974816403e14fba6.zip
Fix broken FileCheck prefixes
llvm-svn: 209538
Diffstat (limited to 'llvm/test/CodeGen/ARM64')
-rw-r--r--llvm/test/CodeGen/ARM64/cse.ll2
-rw-r--r--llvm/test/CodeGen/ARM64/csel.ll6
-rw-r--r--llvm/test/CodeGen/ARM64/vmul.ll16
3 files changed, 12 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/ARM64/cse.ll b/llvm/test/CodeGen/ARM64/cse.ll
index d98bfd60539..bb14c895504 100644
--- a/llvm/test/CodeGen/ARM64/cse.ll
+++ b/llvm/test/CodeGen/ARM64/cse.ll
@@ -13,7 +13,7 @@ entry:
; CHECK: b.ge
; CHECK: sub
; CHECK: sub
-; CHECK_NOT: sub
+; CHECK-NOT: sub
; CHECK: ret
%0 = load i32* %offset, align 4
%cmp = icmp slt i32 %0, %size
diff --git a/llvm/test/CodeGen/ARM64/csel.ll b/llvm/test/CodeGen/ARM64/csel.ll
index 98eba30f119..9b42858558b 100644
--- a/llvm/test/CodeGen/ARM64/csel.ll
+++ b/llvm/test/CodeGen/ARM64/csel.ll
@@ -79,9 +79,9 @@ define i32 @foo7(i32 %a, i32 %b) nounwind {
entry:
; CHECK-LABEL: foo7:
; CHECK: sub
-; CHECK-next: adds
-; CHECK-next: csneg
-; CHECK-next: b
+; CHECK-NEXT: adds
+; CHECK-NEXT: csneg
+; CHECK-NEXT: b
%sub = sub nsw i32 %a, %b
%cmp = icmp sgt i32 %sub, -1
%sub3 = sub nsw i32 0, %sub
diff --git a/llvm/test/CodeGen/ARM64/vmul.ll b/llvm/test/CodeGen/ARM64/vmul.ll
index b6bd16ac0b4..9d08b9dc347 100644
--- a/llvm/test/CodeGen/ARM64/vmul.ll
+++ b/llvm/test/CodeGen/ARM64/vmul.ll
@@ -1201,35 +1201,35 @@ define <2 x i64> @umlsl_lane_2d(<2 x i32>* %A, <2 x i32>* %B, <2 x i64>* %C) nou
; Scalar FMULX
define float @fmulxs(float %a, float %b) nounwind {
; CHECK-LABEL: fmulxs:
-; CHECKNEXT: fmulx s0, s0, s1
+; CHECK-NEXT: fmulx s0, s0, s1
%fmulx.i = tail call float @llvm.arm64.neon.fmulx.f32(float %a, float %b) nounwind
-; CHECKNEXT: ret
+; CHECK-NEXT: ret
ret float %fmulx.i
}
define double @fmulxd(double %a, double %b) nounwind {
; CHECK-LABEL: fmulxd:
-; CHECKNEXT: fmulx d0, d0, d1
+; CHECK-NEXT: fmulx d0, d0, d1
%fmulx.i = tail call double @llvm.arm64.neon.fmulx.f64(double %a, double %b) nounwind
-; CHECKNEXT: ret
+; CHECK-NEXT: ret
ret double %fmulx.i
}
define float @fmulxs_lane(float %a, <4 x float> %vec) nounwind {
; CHECK-LABEL: fmulxs_lane:
-; CHECKNEXT: fmulx.s s0, s0, v1[3]
+; CHECK-NEXT: fmulx.s s0, s0, v1[3]
%b = extractelement <4 x float> %vec, i32 3
%fmulx.i = tail call float @llvm.arm64.neon.fmulx.f32(float %a, float %b) nounwind
-; CHECKNEXT: ret
+; CHECK-NEXT: ret
ret float %fmulx.i
}
define double @fmulxd_lane(double %a, <2 x double> %vec) nounwind {
; CHECK-LABEL: fmulxd_lane:
-; CHECKNEXT: fmulx d0, d0, v1[1]
+; CHECK-NEXT: fmulx d0, d0, v1[1]
%b = extractelement <2 x double> %vec, i32 1
%fmulx.i = tail call double @llvm.arm64.neon.fmulx.f64(double %a, double %b) nounwind
-; CHECKNEXT: ret
+; CHECK-NEXT: ret
ret double %fmulx.i
}
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