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author | Bob Wilson <bob.wilson@apple.com> | 2009-10-08 06:02:10 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2009-10-08 06:02:10 +0000 |
commit | 7d94eb47223343bee7146917f39edafdf751375a (patch) | |
tree | 04b12ee8b0d3b48f809d872bd18276004e998aa7 /llvm/test/CodeGen/ARM/vorr.ll | |
parent | b6b0ab6117294cd36f0a572fdec1e18d405cb6e7 (diff) | |
download | bcm5719-llvm-7d94eb47223343bee7146917f39edafdf751375a.tar.gz bcm5719-llvm-7d94eb47223343bee7146917f39edafdf751375a.zip |
Convert more NEON tests to use FileCheck.
llvm-svn: 83528
Diffstat (limited to 'llvm/test/CodeGen/ARM/vorr.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/vorr.ll | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/vorr.ll b/llvm/test/CodeGen/ARM/vorr.ll index 5788bb2cb68..e9777ab7649 100644 --- a/llvm/test/CodeGen/ARM/vorr.ll +++ b/llvm/test/CodeGen/ARM/vorr.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+neon > %t -; RUN: grep vorr %t | count 8 -; Note: function names do not include "vorr" to allow simple grep for opcodes +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @v_orri8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: v_orri8: +;CHECK: vorr %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = or <8 x i8> %tmp1, %tmp2 @@ -10,6 +10,8 @@ define <8 x i8> @v_orri8(<8 x i8>* %A, <8 x i8>* %B) nounwind { } define <4 x i16> @v_orri16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: v_orri16: +;CHECK: vorr %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = or <4 x i16> %tmp1, %tmp2 @@ -17,6 +19,8 @@ define <4 x i16> @v_orri16(<4 x i16>* %A, <4 x i16>* %B) nounwind { } define <2 x i32> @v_orri32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +;CHECK: v_orri32: +;CHECK: vorr %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = or <2 x i32> %tmp1, %tmp2 @@ -24,6 +28,8 @@ define <2 x i32> @v_orri32(<2 x i32>* %A, <2 x i32>* %B) nounwind { } define <1 x i64> @v_orri64(<1 x i64>* %A, <1 x i64>* %B) nounwind { +;CHECK: v_orri64: +;CHECK: vorr %tmp1 = load <1 x i64>* %A %tmp2 = load <1 x i64>* %B %tmp3 = or <1 x i64> %tmp1, %tmp2 @@ -31,6 +37,8 @@ define <1 x i64> @v_orri64(<1 x i64>* %A, <1 x i64>* %B) nounwind { } define <16 x i8> @v_orrQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind { +;CHECK: v_orrQi8: +;CHECK: vorr %tmp1 = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = or <16 x i8> %tmp1, %tmp2 @@ -38,6 +46,8 @@ define <16 x i8> @v_orrQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind { } define <8 x i16> @v_orrQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: v_orrQi16: +;CHECK: vorr %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i16>* %B %tmp3 = or <8 x i16> %tmp1, %tmp2 @@ -45,6 +55,8 @@ define <8 x i16> @v_orrQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind { } define <4 x i32> @v_orrQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind { +;CHECK: v_orrQi32: +;CHECK: vorr %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i32>* %B %tmp3 = or <4 x i32> %tmp1, %tmp2 @@ -52,6 +64,8 @@ define <4 x i32> @v_orrQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind { } define <2 x i64> @v_orrQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind { +;CHECK: v_orrQi64: +;CHECK: vorr %tmp1 = load <2 x i64>* %A %tmp2 = load <2 x i64>* %B %tmp3 = or <2 x i64> %tmp1, %tmp2 |