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| author | Bob Wilson <bob.wilson@apple.com> | 2009-08-06 18:46:26 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-08-06 18:46:26 +0000 |
| commit | e3ec5b6d76108a12c1d692105b05f4f998023e95 (patch) | |
| tree | 8b1adac054c0a3439d011bb5a26fe1b08c43e54c /llvm/test/CodeGen/ARM/vld1.ll | |
| parent | 2d8d6559229a927653a8c3ba32180d731e298dce (diff) | |
| download | bcm5719-llvm-e3ec5b6d76108a12c1d692105b05f4f998023e95.tar.gz bcm5719-llvm-e3ec5b6d76108a12c1d692105b05f4f998023e95.zip | |
Fix incorrect intrinsic declarations.
llvm-svn: 78329
Diffstat (limited to 'llvm/test/CodeGen/ARM/vld1.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vld1.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/ARM/vld1.ll b/llvm/test/CodeGen/ARM/vld1.ll index 2a5ee04ebaf..d5191338c9a 100644 --- a/llvm/test/CodeGen/ARM/vld1.ll +++ b/llvm/test/CodeGen/ARM/vld1.ll @@ -70,14 +70,14 @@ define <2 x i64> @vld1Qi64(i64* %A) nounwind { ret <2 x i64> %tmp1 } -declare <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readnone -declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16*) nounwind readnone -declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32*) nounwind readnone -declare <2 x float> @llvm.arm.neon.vld1f.v2f32(float*) nounwind readnone -declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64*) nounwind readnone +declare <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readonly +declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i8*) nounwind readonly +declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i8*) nounwind readonly +declare <2 x float> @llvm.arm.neon.vld1f.v2f32(i8*) nounwind readonly +declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i8*) nounwind readonly -declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readnone -declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16*) nounwind readnone -declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32*) nounwind readnone -declare <4 x float> @llvm.arm.neon.vld1f.v4f32(float*) nounwind readnone -declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64*) nounwind readnone +declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readonly +declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i8*) nounwind readonly +declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i8*) nounwind readonly +declare <4 x float> @llvm.arm.neon.vld1f.v4f32(i8*) nounwind readonly +declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i8*) nounwind readonly |
