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| author | James Molloy <james.molloy@arm.com> | 2012-09-06 09:16:01 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2012-09-06 09:16:01 +0000 |
| commit | 34e9931bec0bd85862fb6ed2e14b43cb3e43fe4c (patch) | |
| tree | a514a9db426a7cd569e3aa6c2b81764401a6489b /llvm/test/CodeGen/ARM/vget_lane.ll | |
| parent | fdff4a8e0b31a88ea020d8e40ae48f4682a30702 (diff) | |
| download | bcm5719-llvm-34e9931bec0bd85862fb6ed2e14b43cb3e43fe4c.tar.gz bcm5719-llvm-34e9931bec0bd85862fb6ed2e14b43cb3e43fe4c.zip | |
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
llvm-svn: 163298
Diffstat (limited to 'llvm/test/CodeGen/ARM/vget_lane.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vget_lane.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/vget_lane.ll b/llvm/test/CodeGen/ARM/vget_lane.ll index 1fc885d6137..2ed65c9aeed 100644 --- a/llvm/test/CodeGen/ARM/vget_lane.ll +++ b/llvm/test/CodeGen/ARM/vget_lane.ll @@ -200,7 +200,7 @@ define <8 x i16> @vsetQ_lane16(<8 x i16>* %A, i16 %B) nounwind { define <4 x i32> @vsetQ_lane32(<4 x i32>* %A, i32 %B) nounwind { ;CHECK: vsetQ_lane32: -;CHECK: vmov.32 +;CHECK: vmov s %tmp1 = load <4 x i32>* %A %tmp2 = insertelement <4 x i32> %tmp1, i32 %B, i32 1 ret <4 x i32> %tmp2 |
