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| author | Jim Grosbach <grosbach@apple.com> | 2011-11-14 23:03:21 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-14 23:03:21 +0000 |
| commit | 3e2c6f380c5700d17370a4bfa998acffeed1c32d (patch) | |
| tree | 233060be861c2984ea971849474856156a3c32b4 /llvm/test/CodeGen/ARM/vext.ll | |
| parent | 0201a4c2d361efa54155c482d250bdc869bd472f (diff) | |
| download | bcm5719-llvm-3e2c6f380c5700d17370a4bfa998acffeed1c32d.tar.gz bcm5719-llvm-3e2c6f380c5700d17370a4bfa998acffeed1c32d.zip | |
ARM VLDR/VSTR instructions don't need a size suffix.
Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.
llvm-svn: 144583
Diffstat (limited to 'llvm/test/CodeGen/ARM/vext.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vext.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/vext.ll b/llvm/test/CodeGen/ARM/vext.ll index 65b5913e40a..e224bdfe25a 100644 --- a/llvm/test/CodeGen/ARM/vext.ll +++ b/llvm/test/CodeGen/ARM/vext.ll @@ -138,7 +138,7 @@ define <8 x i16> @test_illegal(<8 x i16>* %A, <8 x i16>* %B) nounwind { ; Make sure this doesn't crash define arm_aapcscc void @test_elem_mismatch(<2 x i64>* nocapture %src, <4 x i16>* nocapture %dest) nounwind { ; CHECK: test_elem_mismatch: -; CHECK: vstr.64 +; CHECK: vstr %tmp0 = load <2 x i64>* %src, align 16 %tmp1 = bitcast <2 x i64> %tmp0 to <4 x i32> %tmp2 = extractelement <4 x i32> %tmp1, i32 0 |
