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author | James Molloy <james.molloy@arm.com> | 2014-01-20 17:14:48 +0000 |
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committer | James Molloy <james.molloy@arm.com> | 2014-01-20 17:14:48 +0000 |
commit | 43ccae1bb4fb602595c028af2414f7c83b23ffce (patch) | |
tree | 9dd68231b406e918c78aa328f7a41f6018d0c12a /llvm/test/CodeGen/ARM/vdup.ll | |
parent | db2a4af37fadedecaf3e7b396af75f91757a0719 (diff) | |
download | bcm5719-llvm-43ccae1bb4fb602595c028af2414f7c83b23ffce.tar.gz bcm5719-llvm-43ccae1bb4fb602595c028af2414f7c83b23ffce.zip |
Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN.
llvm-svn: 199675
Diffstat (limited to 'llvm/test/CodeGen/ARM/vdup.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/vdup.ll | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/vdup.ll b/llvm/test/CodeGen/ARM/vdup.ll index f46f3921111..db1a5163e5d 100644 --- a/llvm/test/CodeGen/ARM/vdup.ll +++ b/llvm/test/CodeGen/ARM/vdup.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon -verify-machineinstrs | FileCheck %s define <8 x i8> @v_dup8(i8 %A) nounwind { ;CHECK-LABEL: v_dup8: @@ -331,3 +331,35 @@ define <8 x i8> @check_i8(<16 x i8> %v) nounwind { %2 = insertelement <8 x i8> %1, i8 %x, i32 1 ret <8 x i8> %2 } + +; Check that an SPR splat produces a vdup. + +define <2 x float> @check_spr_splat2(<2 x float> %p, i16 %q) { +;CHECK-LABEL: check_spr_splat2: +;CHECK: vdup.32 d + %conv = sitofp i16 %q to float + %splat.splatinsert = insertelement <2 x float> undef, float %conv, i32 0 + %splat.splat = shufflevector <2 x float> %splat.splatinsert, <2 x float> undef, <2 x i32> zeroinitializer + %sub = fsub <2 x float> %splat.splat, %p + ret <2 x float> %sub +} + +define <4 x float> @check_spr_splat4(<4 x float> %p, i16 %q) { +;CHECK-LABEL: check_spr_splat4: +;CHECK: vdup.32 q + %conv = sitofp i16 %q to float + %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0 + %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer + %sub = fsub <4 x float> %splat.splat, %p + ret <4 x float> %sub +} + +define <4 x float> @check_spr_splat4_lane1(<4 x float> %p, i16 %q) { +;CHECK-LABEL: check_spr_splat4_lane1: +;CHECK: vdup.32 q{{.*}}, d{{.*}}[1] + %conv = sitofp i16 %q to float + %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 1 + %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> + %sub = fsub <4 x float> %splat.splat, %p + ret <4 x float> %sub +} |